Design And Implementation Of A LVDS Chip With High Speed

More recently,with the spread of electronic devices such as computers and smartphones,the amount of semaphore sent per second has increased,and new standards have been proposed for signal speed(bandwidth).which puts forward a new standard for the transmission speed of signals,namely bandwidth.At the same time,portable electronic products have higher requirements on power consumption and area.Some traditional interface technologies are gradually unable to meet the requirements,and an interface technology with faster transmission speed is urgently needed to complete the current data transmission.Low voltage differential signal interface technology is a high-speed signal transmission technology,the main idea is to use the350 m V low voltage swing differential signal to transmit data,connection mode point-to-point or point-to-multipoint compared with CMOS signal and TTL signal,lower voltage swing to achieve a higher transmission rate.It is widely used in hundreds or even thousands of megabytes of high-speed data transmission for its high speed,low power consumption,small area,low noise and good compatibility.Its good performance makes it become the research hotspot of high speed interface chip.For high-speed interface circuits,due to the attenuation of signal line to the high frequency part of the signal,the driving ability of LVDS driver and the minimum input threshold of the receiver to the input signal appear to be very important.The introduction of a pre-weighted circuit can compensate the attenuation of the transmitter in the high frequency part and increase the driving ability of the transmitter.The receiver input signal swinging range is large,the input total model range is wide,the introduction of constant span rail to rail circuit,increase the input range of the receiver.LVDS circuit design and simulation are carried out based on 0.13μm standard CMOS process.The main work includes LVDS overall architecture selection,LVDS sending and receiving circuit design,bandgap reference source design,overall circuit layout design and post-simulation.The transmitting circuit includes a pre-weighted signal generating circuit,a digital single-to-double circuit and a main circuit of the transmitter.The receiving circuit includes a constant span guide rail to rail input circuit;The reference source has a reference voltage source and a reference current source.The simulation results show that the temperature coefficient of band-gap reference voltage reaches 10ppm/℃ when the temperature range is from 40℃ to150℃ under the power supply of 3.3V.Under typical conditions,the output signal delay error of the pre-weighted signal generation circuit is less than 50 ps,the minimum pulse width of the input differential signal is less than 520 ps,and the output differential voltage range is between 247 m V and 454 m V.Under the condition of a load of 10 p F,the LVDS transmitter can send differential waveform normally.The common mode input range of the receiver input stage is 0V～3.3V,the input equivalent transconductance change rate is less than 5%,the input high threshold is 35.2m V,the input low threshold is-34.9m V,at the input signal frequency of 1Gbps,the difference of 100 m V and the load of 5 p F,the receiver can output the waveform normally,the transmission delay is less than 800 ps.Because it is a high frequency circuit,sending and receiving circuit is symmetrical and structure,so the landscape main consideration in the design of various modules of symmetry,input and output signal well block,at the same time,the signal input and output port signal line,it is necessary to take into account the parasitic resistance,the influence of the module between the cascade as short as possible and symmetry.After the simulation structure shows that the circuit in the input signal of 1Gbps,the chip can transmit the signal normally,and the technical parameters are in line with the protocol standards.