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Design And Implementation Of A 2.5Gbps High Speed LVDS Transceiver

Posted on:2010-08-21Degree:MasterType:Thesis
Country:ChinaCandidate:H P XiaoFull Text:PDF
GTID:2178360278956742Subject:Software engineering
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As the requirements of off-chip communication increase continuously and problems associated with high-speed parallel transmission emerge gradually in terms of bandwidth, cost and date rate, the design of high-speed serial transmission has become an important research direction. Unfortunately, the current research of the high-speed serial signal transmission technology is still very poor in China. This dissertation mainly aims at the research of high-speed serial transceiver, which is the key circuit of the high-speed serial signal transmission system.Based on the intensive understanding on the high speed signal transmission theory, a LVDS high-speed serial transceiver with 2.5Gbps data rate for PCI-Express has been designed and implemented in a 0.13um standard CMOS technology. Post layout simulation results by Hspice indicate that the LVDS transceiver satisfies the application requirements of the PCI-Express standard. Through the design of LVDS transceivers, some innovation and technical difficulties already solved can be concluded as follow.1. A novel LVDS receiver structure, which comprises pre-amplifier, current select module and main comparator, has been proposed. This receiver not only increases the receiver sensitivity greatly ( More than 100mV differential voltage swing can be identified ), but also supports wide input common mode range ( from 0.2V to 2.2V) under the high speed transmission condition.2. A new pre-emphasis circuit has been designed for this high operating frequency system which can compensate the high frequency components attenuation. The simulation results show that these circuit modules have good effect on guaranteeing signal integrity.3. A CMOS voltage reference with low cost, high accuracy and adjustable output has been designed. This reference with simple structure has small area and achieves high performance. The temperature coefficient of 21.6 ppm/℃and the line regulation of 0.256%/V are obtained. At the same time it can generate multiple voltage reference outputs. Therefore, this voltage reference in this dissertation can be applied widely with preferable prospects.4. The over heat protected and Fail-Safe circuits have also been designed in order to enhance the system stability and reliability.
Keywords/Search Tags:LVDS, Pre-emphasis, CMOS Voltage Reference, Hysteretic Comparator
PDF Full Text Request
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