Gigabit Ethernet (FPGA Implementations)

The Ethernet core is designed for implementation of CSMA/CD LAN in accordance with the IEEE 802.3 standards. The Gigabit Ethernet technology is the high speed networking standard. Actually there are very few devices in the market and they do not provide coding and encoding. Hence this project deals with 8b/10b ENDEC for Gigabit Ethernet. It's a FPGA implementation and VLSI design & verification. In order to meet fast time to market requirements today's complex digital system design are using FPGAs. This paper will show you the design of 8b/10b Encoder/Decoder for Gigabit Ethernet using Actel SX FPGA.;VHDL is a high performance language for implementation and simulation. It integrates computation visualization and programming in an easy to use environment. VHDL is therefore built on a foundation of sophisticated language in which the basic element can implement it and verify it for hardware implementation.;Active HDL software is used for simulation and optimization of synthesizable VHDL code. This software is also used to verify the code generated in other applications.