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Design And Implementation Of Gigabit Ethernet Controller Based On FPGA

Posted on:2015-03-22Degree:MasterType:Thesis
Country:ChinaCandidate:F GongFull Text:PDF
GTID:2268330431963888Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
Ethernet technology is developing rapidly Since its birth, it is widely used invarious fields. In the field of aviation, the airborne data acquisition system isneeded totransmit huge amounts of data in real time. Based on this background, this paperpresents a design scheme of using FPGAto realize gigabit EthernetThe key of ethernet is Media Access Control(MAC)layer and Physical(PHY) layer.Considering the special requirements of the air environment for airborne equipment, inthis paper, small volume, low power consumption are the basic principle for thedesign.This article built a System on programmable Chip(SOPC) in the platform ofCycloneIII series of FPGA producted by Altera corporation. A NiosⅡ soft coreprocessor is the core of this system.It contains a variety of peripherals,One of the mostimportant is gigabit Ethernet MAC.Chip88e1111was used as the Gigabit Ethernetphysical layer.To achieve gigabit Ethernet communication, this paper designs the correspondingEthernet driver.We transplanted a lightweight TCP/IP protocol stack—LwIP for thesysytem, and realize data transmission with the UDP protocol.
Keywords/Search Tags:Gigabit Ethernet, SOPC, NiosⅡ, LwIP, UDP
PDF Full Text Request
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