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Research And Implementation Of Ten Gigabit Ethernet And High-speed Image Transmission System Based On FPGA

Posted on:2018-04-19Degree:MasterType:Thesis
Country:ChinaCandidate:P LiFull Text:PDF
GTID:2348330518999096Subject:Computer application technology
Abstract/Summary:PDF Full Text Request
With the rapid development of science and technology and the improvement of human quality of life,high frame rate and high resolution images have been gradually and widely used in scientific research,industrial production and life entertainment fields.However,a large number of image data information will be needed by high frame rate and high resolution images,so it's very significant to achieving a real-time system to gather high-speed images.Therefore,the system is designed based on FPGA to gather,display and transmission images at a high rate of speed.Firstly,the paper analyzes several existing image transmission interfaces,and finally selects the Camera Link interface as the image transmission interface as the image transmission interface of the system.Then we study the principle of data transmission of Camera Link interface,and use FPGA to realize the data receiving circuit.The image caching system is designed inside the FPGA to store image data into the DDR3 because the FPGA interspace is not sufficient to cache too much information,the data will be sent to the display on displayer.The image data is displayed in real-time through the HDMI interface.For the transmission of image data,the paper studies the latest Ethernet transmission technology,and finally chose10 Gigabit Ethernet to transmit image data.The whole system consists of two designs.One is the hardware circuit on FPGA,another is the software to send and receive data.I use FPGA as the master controller to achieve the image timing control and data acquisition,combined with DDR3 data cache,HDMI(High Definition Multimedia Interface)for real-time display.In the meanwhile,the image data collected will be transmit to computer Through the MBPS.The open source library of Win Pcap is used to send and receive data packet.The Win Pcap provides the function interface,the users can design network driven function according to own requirement.In order to maximize the real-time processing performance and image transmission efficiency of the system,two subsystems are designed for high-speed acquisition of images and high-speed transmission of images.First is high-speed image real-time display system.The system uses the FPGA to realize the data receiving module of the Camera Link interface,and then I store the original image data into data cache module to transfer image format and process color.Finally the image processed is displayed in real-time with the HDMI.Second is high-speed image transmission system.After using the FPGA to realize the data receiving of the Camera Link interface,system uses the internal RAM for temporary storage,according to the software receiving program to customize the communication protocol,and finally transmits the image data to the computer using 10 Gigabit Ethernet.The computer to receive network packets,extract the image data stored in the computer hard disk with Win Pcap.In the final,we analyze the performance of the designed system and test the system.The result shows that the system can collect and display the high-speed images in real time.If the overflow of the host computer is not taken into account,the 10 Gigabit Ethernet transmission rate can be close to the theoretical speed of 10 Gbps.At the same time,the paper puts forward an improved method for the shortcomings of the system.The system can be used in other image processing and data transmission scenarios through the rewriting system of FPGA interface and it has a wide range of application prospects.
Keywords/Search Tags:Camera Link, 10 Gigabit Ethernet, HDMI, FPGA
PDF Full Text Request
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