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Design And Implementation Of Domestic Test System Based On Gigabit Ethernet

Posted on:2022-12-08Degree:MasterType:Thesis
Country:ChinaCandidate:H S SuFull Text:PDF
GTID:2518306761490284Subject:Internet Technology
Abstract/Summary:PDF Full Text Request
In the fields of aerospace and aviation,in order to realize the efficient and stable output of type weapons and equipment,the reliability test of the test system is inseparable.With the shortage of foreign devices in the field of electronic testing in recent years,it is urgent to develop a nationalized test bench.In order to solve the issue of data instruction through1553 B protocol in an aerospace institute,this topic adopts FPGA as the main control chip,configures the 1553 B message block format through IP core,and realizes the communication control of 1553 B message.Aiming at the problem that the communication interface between the PC and the test system does not match,the PC-side Ethernet interface is used to realize the interface conversion.Based on the research status of test systems at home and abroad,the development trend of localized devices such as FPGA and Gigabit Ethernet chips,and the needs of actual scientific research projects,this paper designs a nationally produced test equipment.In order to realize the issuance of 1553 B instructions,the test system adopts the way of software and hardware co-design,which improves the reliability of data transmission.By analyzing the differences between domestic devices and foreign benchmark devices,the hardware circuit of the FPGA minimum system is analyzed in detail,the data transmission circuit structure is analyzed in depth,the design of each module is explained in detail,and the overall hardware circuit design and test system are completed.And according to the design concept of electromagnetic compatibility,the layout and wiring of the circuit board have been improved.The Ethernet communication protocol and data frame format are analyzed in detail,the logic design of Gigabit Ethernet sending module and receiving module is completed in VHDL language,the configuration of each register and memory of 1553 B bus chip is studied in detail,and the logic 1553 B bus interface design is completed.In order to improve the efficiency of data transmission,the system adopts the UDP communication protocol,and adopts the data check and retransmission mechanism in the logic design,which ensures the reliability and stability of the data transmission process.Finally,by establishing a test platform,the function verification of the test system is realized,including the connection between the upper computer and the test system uplink and downlink,the issuing of the instructions for the 1553 B function card by the upper computer,the communication between the BC and the RT in the 1553 B bus,and The test system uploads the test return command to the function card.After testing and analysis,the equipment command signal transmission is reliable and stable.It has the acceptance conditions for aerospace products.
Keywords/Search Tags:Localization, FPGA, Gigabit Ethernet, 1553B
PDF Full Text Request
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