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10GHz global clock distribution using coupled standing-wave oscillators

Posted on:2005-09-23Degree:Ph.DType:Thesis
University:Stanford UniversityCandidate:O'Mahony, Frank PFull Text:PDF
GTID:2458390008477486Subject:Engineering
Abstract/Summary:
Global clock distribution for multi-GHz microprocessors has become increasingly difficult and time-consuming to design. As the frequency of the global clock continues to increase, the timing uncertainty introduced by the clock network—the skew and jitter—must reduce proportional to the clock period. However, the clock skew and jitter for conventional, buffered H-trees are proportional to latency, which has increased for recent generations of microprocessors.; A global clock network that uses standing waves and coupled oscillators has the potential to significantly reduce both skew and jitter. Standing waves have the unique property that phase does not depend on position, meaning that there is ideally no skew. They have previously been used for board-level clock distribution, on coaxial cables, and on superconductive wires but have never been implemented on-chip due to the large losses of on-chip interconnects. Networks of coupled oscillators have a phase-averaging effect that reduces both skew and jitter. However, none of the previous implementations of coupled-oscillator clock networks use standing waves and some require considerable circuitry to couple the oscillators.; In this thesis, a global clock network that incorporates standing waves and coupled oscillators to distribute a high-frequency clock signal with low skew and low jitter is described. The key design issues involved in generating standing waves on a chip are discussed, including minimizing wire loss within an available technology. A standing-wave oscillator, a distributed oscillator that sustains ideal standing waves on lossy wires, is introduced. A clock grid architecture comprised of coupled, standing-wave oscillators and differential, low-swing clock buffers is presented along with a compact circuit model for networks of oscillators. The measured results for a prototyped standing-wave clock grid operating at 10GHz and fabricated in a 0.18mm 6M CMOS logic process are presented. A technique is proposed for on-chip skew measurements with sub-picosecond precision.
Keywords/Search Tags:Clock, Standing, Oscillators, Coupled, Skew
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