Reconfigurable signal processing architectures for ultrasonic imaging

Ultrasonic imaging has been an essential tool for diagnosis and detection in medical and industrial applications. Often, ultrasound data are acquired, analyzed and processed offline. Recently, there has been an increasing demand for the realization of real-time, online applications of ultrasonic imaging. In this research, we aim to address the increased computational demands of real-time ultrasonic data processing by developing efficient algorithms and architectures for hardware synthesis of ultrasound systems. We have analyzed the frequency-diverse ultrasonic detection methods including split spectrum processing (SSP) and order statistics processors. The objective of frequency-diverse ultrasonic detection is to decorrelate clutter echoes and enhance the visibility of targets. In particular, we have integrated orthogonal transforms: Discrete Cosine Transform (DCT), Walsh-Hadamard Transform (WHT), and Discrete Wavelet Transform (DWT); into detection algorithms. New SSP techniques for each transform have been developed in order to achieve clutter decorrelation and improved target detection. For the hardware synthesis of the ultrasonic detection algorithms, two separate designs are presented. The first approach emphasizes multiplierless, hardware efficient architectures by introducing a multiplierless wavelet implementation based on the minimum adder graph synthesis method. The second design approach employs reconfigurable processing elements (PEs) and provides a dynamic, adaptable platform with significant computational throughput. Pipelined concurrency within the PE network enables parallel execution of multiple wavelet decomposition levels. Reconfigurability of this architecture allows the system to support multiple transforms and wavelet kernels for subband decomposition. Furthermore, hardware implementation of ultrasonic data compression applications has also been examined. Similar to ultrasonic detection, data compression algorithms utilize the same transform methods DCT, WHT and DWT for compacting the ultrasonic signals. The reconfigurable processing elements are modified to support DCT realization and thresholding operations. Recursive IIR filters for DCT implementation have been adapted for this architecture. The final architecture presents a unified solution for both ultrasonic detection and compression applications that require low-power, high speed and compact designs.