| Ciphers are computing-intensive applications needing powerful computing ability. And the same time, ciphers have the characteristics of flexibility, which require the computing platform to meet the flexibility flexibly. Reconfigurable cipher processing architecture not only meets the high performance and flexibility of ciphers, but also has higher security, which is very significant for national and military security and commercial confidentiality. This thesis focuses on the coarse-grain reconfigurable cipher processing architecture, and the main work and research results are as follows:This thesis analyzed the computing structure characteristics of Block Cipher, Public Key Cipher and Hash algorithm, and proposed a general purpose Coarse-Grain Reconfigurable Architecture for the three types of Ciphers (CGRAC). Based on the structure of CGRAC, this thesis researched and designed the Reconfigurable Basic Computational Units (RBCU), the Reconfigurable Functional Unit (RFU) and the Reconfigurable interconnecting Network (RIN), and all the RBCUs and RIN were verified via Altera FPGA and synthesized under UMC0.18μm technology. The configuration instructions were designed for RBCU, RFU and RIN respectively, and according to the length of configuration instructions, the static and the dynamic configuration modes were used in CGRAC. Some main algorithms of the three types of ciphers were mapped on CGRAC respectively, the mapping results showed that CGRAC can map all the ciphers, and the mapping structure of most ciphers were compact and achieved high utilization.According to the mapped results and the synthesized results, this thesis estimated the performance of ciphers on CGRAC at a frequency of 200MHz, the results were compared with other implementations. The compared results indicated that, the performance of most ciphers on CGRAC is 3~48 times higher than on Intel Core 2 1.83G CPU and 1.26~10.20 times higher than on other reconfigurable cipher processing architectures respectively. |
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