Test Of Avalanche Tolerance Of High-Voltage Silicon Carbide

As a new wide band gap(WBG)semiconductor material,silicon carbide(SiC)has attracted more and more attention in industry due to excellent physical properties.As the most popular WBG power device today,SiC MOSFETs have been widely studied and applied in high frequency power converters.In the power electronics applications,the existence of inductive load and stray inductance may introduce an inverse voltage on MOSFETs,which would force the power MOSFETs to enter avalanche breakdown and damage the device.The avalanche breakdown characteristics of SiC MOSFETs play a crucial role in understanding device failure mechanisms and in selecting devices.UIS(Uncampled Inductive Switching)is generally considered to be the most extreme stress of power MOSFETs in power electronic applications.At present,Unclamped Inductive Switching(UIS test)is also used to test avalanche characteristics of power semiconductor devices.Based on the principle of UIS test,a test bench,including an avalanche test circuit board and an monitoring software,is designed and established.Based on the bench,non-destructive and destructive UIS test were performed on the Cree's C2M0280120 D and C3M0280090 D SiC MOSFETs under different experimental conditions,and the avalanche characteristics were summarized.Based on the traditional junction temperature estimation formula,the average junction temperature and transient junction temperature of the device in the UIS test were estimated.In addition,an equivalent model of UIS circuit after the device was turned off is established.The principle of generating oscillation wave between the leakage-source poles of the power MOSFETs during the UIS test is analyzed,and a novel output capacitance test method is proposed.The calculation method of output capacitance is derived,and the reliability of the method and platform is verified by testing the output capacitance of the device.