Design,Manufacture And Test Of 500V-Class Power MOSFET

Power MOSFETs which are switching power devices with a MOS gate,are used in different power electronics systems.Because of the simplification of the drive circuits and high power amplify factor,their application scenarios go wide range.At the same time,for the needs of more and more systems,the characteristics of the devices are developed and improved generation by generation,which results a better trade-off between the electrical and thermal parameters.In this thesis,the breakdown principle of power MOSFET is analyzed.The compact from the different ionization model on the simulated breakdown voltage is comfirmed.And the simulation results based on the Lackner model are in the best agreement with experiments.Based on this and combining the simulation tools,the relationship between the breakdown voltage and the expitaxial layer parameters is deduced.Then the relationship between the breakdown voltage and the on-state resistance is obtained.This tradeoff is based on the comparison between experiments and simulation.So it has more accuracy and more guidance on the practical engineering.Also,a 500V-Class power MOSFET with low-cost is designed,manufactured packaged and tested,which is based on the existing fab with 6'process in domestic.This Power MOSFET is used in low power management system,like mobile phone charger.In the warranty of the basic device parameters,the on-state resistance,miller capacitance and chip size are optimized,which makes the device have strong competitiveness in both performance and cost.At the first,the development and the research status of power semiconductor devices is introduced briefly.The history of the development of power mosfets is illustrated in detail.Then the traditional trade-off relationship between the breakdown voltage and specific on-resistance is corrected and improved in power MOSFET.This modification gives more guidance in actual application and design.And this modified trade-off is used for the chose of the best combination of epitaxial layer parameters in the following design of the 500 V MOSFET.The TCAD tools are used in the design and simulation based on the domestic process.The device structure and electrical characteristics are obtained from the simulation.The range of the implantation dosage is confirmed by the offset simulation.In the design of the termination,the window width and the implantation dosage of the JTE region are also confirmed by the offset simulation.Then the layout design is finished.At last,the power MOSFET is manufactured,packaged in TO-220 form.A wafer-level CP test is done followed the tape-out process.The static characteristics are tested by Keysight B1505 A at room temperature and high temperature.The experimental results are in good agreement with the design.Also,the dynamic characteristics are tested.The key electrical parameters of the pacakaged sample are compared with the IRF840.The test results show that the on-state resistance is smller than the benchmarking product.The miller capacitance is only 5.8% and the chipsize is only 55% of IRF840.In conclusion,the MOSFET of this thesis have full-scale advantages.