Realization On Anti-Radiation SRAM Memory Based On EDAC Algorithm

Static Random Memory is widely used in electronic information equipments due to its high integration,low power consumption and fast access speed.In recent years,it has gradually been adopted in aerospace equipment.The rapidly changing radiation environment in space will cause SRAM to suffer from Single event upset,total dose effect,and displacement destruction effect,which will have different consequences on the memory.Up to permanent damage of the SRAM.Therefore,SRAM memory working in the aero spaces should have better radiation tolerance while maintaining normal functionality.The radiation hardened memory should have the following features:1)when impacted by charged particles in the environment,it can keep the stability of the device,and the data will not be jeopardized in the transmission process;2)if the data is jeopardized in the transmission process,the data should be corrected by error correction and detection circuits before output.The target of this paper is to design an SRAM memory with 128*8 bit storage capacity and radiation resistance.Firstly,the radiation effect in space and the commonly used reinforcement measures are introduced.The memory cell adopts the classical 6-Transistor structure,and the noise margin of the memory cell is analyzed and deduced based on the basic principles of the memory cell and the appropriate transistor size is chosen.Then,the optimal width to length ratio of the SRAM memory array is derived.The design of peripheral circuits further optimizes the speed and signal integrity of SRAM;then the design based on EDAC algorithm enables the memory with radiation hard functionality;Finally,each circuit module is carefully laid out.The key points of this thesis are as follows:1.The system structure layer reinforcement method is used to achieve the radiation hard functionality,and EDAC error detection and correction coding algorithm is used to reinforce SRAM.EDAC algorithm not only can realize the function of "correcting one,checking two",but also can simplify the process of error handling.Through the function test of SRAM memory,the correct simulation results ensure that EDAC module can achieve the corresponding functions.Combined with the design of EDAC module,the semi customized design flow of digital integrated circuit is introduced.2.Considering the design difficulty and layout area,we chose different methods to design layout according to different design modules:The layout of storage array and peripheral circuit is drawn manually in virtuoso environment.The layout of Radiation hard module is achieved by using Innovus APR tool from ocadence.The technology used for this project is 0.25um process from TSMC.EDA tools mainly consist the design tools from cadence.At the end of the design,a detailed functional simulation of SRAM is carried out,using Spectre.The read delay of the memory is 0.7ns,and the write delay is 0.5ns.Radiation Hard SRAM can complete the task of "correcting one and checking two".