Font Size: a A A

Research On Verification Methodology Of Semi-Custom And Full-Custom Mixed Design Flow

Posted on:2009-09-20Degree:MasterType:Thesis
Country:ChinaCandidate:C C FengFull Text:PDF
GTID:2178360242998978Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
As IC integrity and complexity continue to increase, the function of System-on-Chip has become more complex and performance has become higher. At the same time the workload of verification has also increased by exponent. In order to make sure that the chip can work well in short time-to-market, we need combine various verification techniques to verify the whole system sufficiently.The X processor is a 64-bits high performance processor for stream application. We use a semi-custom and full-custom mixed design method to enhance its performance, reduce design cycle and cost. In the design we optimize the RTL-level code and implement the Stream Register File as well as critical data-paths of the Cluster with a full-custom design method. It is a big challenge to verify the chip under the mixed design pattern.In this dissertation, with an understanding of the characteristics of semi-custom and full-custom mixed design method, we propose a verification flow for semi-custom and full-custom mixed design and provide a complete solution for Cluster verification. We discuss the verification method in the following three aspects: functional verification, timing verification and physical verification. In functional verification, we combine the cone-based equivalence check, symbolic simulation based equivalence check and dynamic equivalence check to provide an equivalence verification flow for the Cluster. In timing verification, we analysis a set of various timing models and provide five timing modeling methods for the mixed design pattern. We also propose a dynamic programming based compress arithmetic for the characterization parameter table. The experimental results show that the compressed sub-table can denote the original table with little precision loss. In physical verification, we provide the physical verification flow in deep sub-micron technology and analysis crosstalk effect and signal integrity based static timing analysis. We use the verification methods discussed above to verify the Cluster, which is proved to be a solution that can achieve better results, reduce verification cycle and enhance verification efficiency.
Keywords/Search Tags:Semi-custom/Full-custom Mixed Design, Functional Verification, Equivalence Verification, Timing Verification, Timing Model, Static Timing Analysis, Physical Verification
PDF Full Text Request
Related items