Research On Neural Network Implementation Method Based On Coarse Granular Reconfigurable Array Architecture

In recent years,with the popularity of big data applications and the development of computer hardware,neural network algorithms have developed rapidly.At present,neural networks have a wide range of applications in the fields of speech recognition,computer vision,and intelligent control.The neural network algorithm is a computationally intensive algorithm with parallel characteristics.The high-efficiency computing architecture and hardware for neural network computing has always been the focus of research in the computer field.The coarse-grained reconfigurable array architecture has multiple processing units that can be reconstructed,and the calculated data width is above the byte,which is very suitable for the neural network by reconstructing the hardware logic and changing the data access mode,and the computationally intensive algorithm with parallel characteristics can be efficiently implemented.In this paper,the principle of coarse-grained reconfigurable array architecture and the basic principles of neural network algorithm are studied in depth.Research and design optimization based on the existing coarse-grained reconfigurable array AI processor in the project,and the hardware communication interface and PC-side control program of the reconfigurable array processor module and the host are designed based on the FrontPanel development kit.A complete host-FPGA system for neural network inference calculation is built.The hardware design part is simulated under Modelsim,and the FPGA development process is carried out under ISE.The Kintex7k70 t model FPGA device achieves the 50 Mhz operating frequency and 371 mW power consumption.In addition,in this paper,the quantization principle of neural network is studied in detail,and the data distribution characteristics of various network model parameters and intermediate calculation results are analyzed.In order to perform neural network calculation with low precision parameters in hardware,in this paper,the parameters are linearly quantized into 8bit integer numbers with a dynamic fixed points according to the variation of the network parameters distribution range.At the same time,the single processing unit of the reconfigurable AI processor is redesigned and the dynamic fixed point calculation logic is added,and for the difficult problems such as data bit width variation and overflow in the calculation process,the truncation instruction and debugging flag are added on the basis of the original processor.In the experimental stage,a MNIST classification network model was trained,analyzed and quantified,the inference of the quantified model was successfully implemented in the FPGA in the way of software and hardware cooperative debugging through the host-FPGA communication interface,achieving 97.12% classification accuracy rate,which is equivalent to the classification accuracy rate of 97.98% in the software.The lightweight reconfigurable array AI processor designed and implemented in this paper can realize fast inference calculation of neural network with lower cost and lower power consumption than CPU and GPU,with good meaning of the promotion and application under the resource-constrained scenario.The network parameter quantification method and related logic design and debugging methods proposed in this paper also have a good reference meaning for related research.