General-purpose Algorithms Implementation And Optimization For Coarse-grained Dynamically Reconfigurable Processor

Reconfigurable processor is a cpmpromise between general-purpose processor and ASIC.It has both the flexibility of a general purpose processor and energy-efficient of ASIC.Compared to the fine-grained reconfigurable processor FPGA,Coarse-grained dynamically reconfigurable processor(CGRA)has inherent cost advantages in chip power consumption,configuration file size and configuration time.It has already become a hot topic.Coarse-grained dynamic reconfiguration technology is far from mature.But its moderate flexibility,energy efficiency can make up for the deficiencies of general purpose processor and ASIC.What's more,this architecture exacerbated the difficulty of parallel programming and existing processor is only applicable to specific areas of application.Thus,the research of this subject intends to resolve key technical issues for the common areas and efficient mapping algorithm on reconfigurable architecture.The main work of this paper is divided into three parts.First,based on 13 Dwarfs,this paper proposed a benchmark suite to implement them on reconfigurable platform,and may be able to compare the performance to CPU platforms.Second,by reconfigurable architecture and processor programming model analysis,this paper presents a series of algorithm mapping optimization measures including pipeline mapping and nested loop mapping,then mapped the 13 algorithm on reconfigurable platform with this methods.Third,in order to reflect the rationality and effectiveness of the mapping,this paper will run the 13 algorithm on Intel Atom and collect the performance data and compare them with the performance of reconfigurable platform.The results show that under the current reconfigurable processor simulation environment,the performance has a significant advantage over Atom.In summary,this paper proposed effective optimization methods on the problem that mapping general algorithm to CGRA processor for CGRA architecture,and validated on CGRA platform.This paper has theoretical significance and application value for the design of CGRA architecture and complier.