Research On Array Lidar Architecture And Unit Circuit Based On Linear Mode APD

With the development of artificial intelligence,the competition in related fields such as robots,drones and unmanned vehicles has become very fierce.Lidar is like the eye of the machine,and is the focus of current research.The lidar system includes many modules and unit circuits.Considering the difficulty and the importance of the design,the front receiving circuit is the core of the whole system.Based on SMIC 0.18?m CMOS process,this thesis proposes a high-performanced 5×5 array lidar system and its unit circuit,including transimpedance amplifier,comparator,single-todifferential circuit,peak detect sample and hold circuit and time-to-digital converter,etc.The transimpedance amplifier proposed in this thesis mainly includes a current-mode transimpedance preamplifier and an inverter transimpedance amplifier.Under the control of logic circuits,transimpedance amplifiers can realize four types of gain switching.It is a highgain,wide-range transimpedance amplifier.In order to achieve the balance of transmission delay between small signal and large signal,the comparator proposed in this thesis chooses low dispersion delay multiple stages with high gain,broad bandwidth.Because of the high gain,the large signal transmission delay is low,and the small signal transmission delay is high,and the multi-stage comparator can not only increase the delay time when a large signal passes through each stage,but also increase the bandwidth of the entire circuit.Therefore,the transmission delay of the small signal is reduced.The single-to-differential circuit proposed in this thesis is used in the transimpedance amplifier,and the current mirror module is composed of a constant current source.The structure has high precision,wide bandwidth,adjustable converter gain,adjustable output common-mode voltage,small output signal differential amplitude and phase error,and high symmetry.The TIA output signal is sampled and hold by a peak detect sample and hold circuit(PDSH),which will be further quantized by the ADC of other modules.It has the advantages of high linearity,small voltage overshoot and high precision.A time-to-digital converter is proposed based on FPGA,whose multiple Stop signals under double threshold method can measured with only one TDC.In the coarse counting phase,the counter counts the number of clock signals,and in the fine counting phase,the edge detection is performed using the structure of the carry chain.The sum of these two results is the output of the entire TDC.These unit circuits can be combined into a single-channel laser radar.Through the improvement of circuit multiplexing and signal control,the front receiving circuit of the arrayed laser radar can be designed.Through the simulation of Cadence Spectre,the gain dynamic range of the transimpedance amplifier designed in this thesis reaches 60dB(46dB~106dB),which can be used to measure the current of 0.5mA~5mA for practical applications.The rising edge of the comparator output designed in this thesis.(Taking 80% of the whole rising process)is only about 66.42 ps,which can guarantee the accuracy of the latter stage TDC.According to the requirement of low-delay walk,when the transmission delay of the minimum input is compared with the transmission delay of the maximum input,the error between the two delays is only 320 ps.The single-to-differential circuit differential output designed in this thesis produces a symmetrical error of less than 10%.The peak detect sample and hold circuit overshoot error designed in this thesis is less than 10%.After testing by FPGA,the time-to-digital converter designed in this thesis can measure the farthest distance of 200 m and the measurement error is centimeter level.