Research And Design Of Current Comparator And Sample-and-Hold Circuit Based On CMOS Process

As the characteristic size of new semiconductor components decreases step by step,the integration degree of microelectronic circuits becomes higher.As the mainstream technology of integrated circuit design,CMOS technology has strong anti-interference ability,low power consumption and high integration,and is widely used in various commercial circuit.Currently analog circuit and RF receiver front-end design mostly adopts voltage-mode structure.Voltage-mode circuit is susceptible to parasitic capacitance and stray capacitance at high frequency.Compared with voltage-mode circuit,current-mode is used in analog-to-digital conversion circuit(A/D)and chaotic system design because of its stable bandwidth and high working frequency.Current-mode comparator and sampling and holding circuit based on CMOS technology are widely used.as a key part of A/D,and designed at home and abroad.The research contents of this thesis are as follows:1.A current comparator based on Wilson current source was proposed.Because of the higher output impedance of Wilson current mirror,the input signal of small current can be converted into the output voltage signal of large amplitude.The converted voltage signal is amplified by stages to achieve rail-to-rail output.In this thesis,the input capacitance of differential amplifier is analyzed,and the signal delay is reduced by reducing the input capacitance.The circuit layout uses TSMC 0.18?m CMOS process,the comparison delay of 2.2 ns and the power consumption of 95 ?W are obtained at the TT(typical-typical)process corner and temperature of 40?.2.By studying the cascode current source,it is found that when the input of the cascode current source is connected in series with the gate of the MOS and connected with the same voltage,the circuit can get good input voltage redundancy,which means that it has better compatibility under the condition of low supply voltage.When the offset of supply voltage is± 10%,the circuit can also work normally.Based on this,a current-mode comparator based on improved cascode structure was proposed in this thesis,the improved current comparator based on cascode current source was simulated at different process corners.The experimental results show that the circuit achieves the lowest power consumption at SS(slow-slow)process corner and temperature of-40?,the lowest comparative delay at FF(fast-fast)process corner and temperature of 100?.The comparative delay of 2.55 ns and power consumption of 86 ?W at TT process corner and temperature of 40?.3.A current-mode sample-and-hold circuit was proposed.based on CMOS process The cascaded transistors which form a cascode structure at the output stage are analyzed.A single-stage amplifier was introduced into the input stage to reduce the offset caused by current injection.Finally,the effect of constant feedthrough is reduced by a differential structure.The structure achieves 12.4-bit sample accuracy.