Design Of A Transceiver Chip Based On The 1553B Bus

MIL-STD-1553B data bus has been widely used in aerospace field and modern weapon system because of its advantages of efficient data transmission between subsystems,flexible communication system,strong anti-jamming ability and so on.And it has become an internationally recognized data bus standard.The core part of 1553B bus system is bus interface chip.However,due to the deficiency of design and production capacity,most of the domestic bus interface chips are imported from abroad,which are costly and limited in performance.Therefore,research and development of1553B bus interface chip with higher transmission rate independently has theoretical and practical significance to our nation's scientific research,national defense and economy.On the premise of intensively study of MIL-STD-1553B bus and the user manual of mainstream transceiver chips at home and abroad,and on the basis of testing the performance of mainstream transceiver chips in service,a 1553B bus transceiver chip with 3.3 V low power supply voltage and 1²0 MHz adjustable signal frequency are designed in this dissertation,which meets the reliability requirements of the bus at the same time.The transceiver chip mainly consists of three modules:receiver,transmitter and logic controller.The main circuits of the receiver include amplitude limiter circuit,filter circuit and comparator circuit.The main circuits of the transmitter include delay circuit and shaping circuit.The main circuits of the logic control module include trigger circuit and shift register circuit.Firstly,the development history,characteristics and advantages,hardware equipment and bus protocol of the MIL-STD-1553B bus are studied.The overall structure block diagram and two connection modes between bus and transceiver chip are given.Then,the performance parameters of HI-1573PSI bus transceiver chip of HOLT company,which has a large market share,are measured.The performance indexes of the designed transceiver circuit are listed with reference to the measurement results and related products developed in China.Based on GlobalFoundries 0.18 um BCDlite process technology,the circuits of each submodule are designed and simulated,and the key circuits of each module are analyzed.Then the function and performance of the entire transceiver are simulated and verified.The transceiver designed in this paper can steadily work at a signal frequency range of 1²0 MHz,and the performances meets the design requirements at the same time.Finally,the layouts is designed according to the process technology rules,and its matching,area,parasitic parameters and noise are optimazed.The designed circuits in this paper is based on the GlobalFoundries 0.18 um BCDlite process technology.The final circuit simulation results show that the differential input impedance of the receiver is 4.87 k?,the differential input capacitance is 0.09 pF,the common mode voltage is 6 V_peak,and the open voltage is 300 mV_PP.The transmitter's rising time is 114 ns,the falling time is 123 ns,the peak voltage is 7.14 V,and the output noise voltage is 0.058 mV,which meet the corresponding performance requirements.