The Development Of S-band Frequency Synthesizer

There have been a large number of researches and projects about the frequency synthetic technology since it was first presented in 1930 s,which has been playing a critical role in the development of telecommunication systems.Among the varieties of frequency bands,S-band has been a widely used in different techniques including radar communication,satellite communication,Bluetooth equipment,wireless devices and even the hot topic ——5G technology.Under such a design background,a frequency synthesizer that works in the S-band is proposed in this thesis.The frequency synthesizer could be classified into plenty of types according to different work models and design methods,while the technical route of phase-locked frequency synthesis is preferred in the thesis,which is split into a few parts.Firstly,the analysis of the structure of the phase-locked loop,including reference source,phase detector,and loop filter,is introduced.Next,Based on the phase model of the phase-locked loop,the transfer function of the phase-locked loop is derived and the phase noise and spur index of the phase-locked loop are briefly analyzed.According to the design theory of transistor circuit and oscillator circuit,a Voltage Controlled Oscillator that is related to the oscillator circuit bias circuit,tuning circuit and feedback loop has been simulated through the ADS(Advanced Design System)software,which combined with the classic Leeson formula and the theory of quality factor theory.And the modified simulation model,which is based on the quality factor has improved the phase noise characteristics of the oscillator circuit to a certain degree.The final result showed that the Voltage Controlled Oscillator operating at 3.0 GHz to 3.6 GHz was a successful designed work as the output signal power was output.the phase noise is-90dBc/Hz@10kHz,which basically meets the design standard requirements.Moreover,the results of comparison with the VCO chip of the mainstream manufacturers on the market has shown that the VCO designed in this thesis has lower design cost,is more flexible and close to mature products in performance index,which is practically applicable.In the last part,according to the analysis of ADS simulation about the design order of the loop filter in the phase-locked loop,the third-order loop filter is selected as the filter scheme.And the corresponding chip peripheral circuit is designed based on the function needs and the chip arrangement of the ring chip ADF4150,which is proved by the simulation result of the loop bandwidth and loop system through the ADIsimpll software.Finally,with the voltage controlled oscillator design in Chapter 3,the S-band frequency synthesizer is designed with the external processing control circuit,which implemented the related control operation.The test on the phase noise,spectrum spurs and other indicators showed that the frequency synthesizer is capable to work stably with steady output signals at 3GHz-3.6GHz,whose signal amplitude is greater than-5dbm,and phase noise is about-95dBc/Hz@10kHz,with favorable spurious suppression,which reached more than 60 dB.The test results mentioned above showed that the design basically meets the expected requirements.This thesis is based on oscillator design theory and phase-locked loop frequency synthesis theory.It mainly completes a transistor-based voltage-controlled oscillator circuit,and it designs and completes other components of phase-locked loop such as loop filter.By using of the chip ADF4150,a phase-locked loop frequency synthesizer operating in the S-band is finally realized,and the phase noise,output power,spurious suppression and other indicators are tested.This design meet the requirements,have a certain application value.At the end of this thesis,some shortcomings of the design are summarized.,and put forward the follow-up work arrangement and design outlook.