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Design Of New SPI NOR Flash Chip Test System

Posted on:2020-12-30Degree:MasterType:Thesis
Country:ChinaCandidate:X ShenFull Text:PDF
GTID:2428330596976369Subject:Engineering
Abstract/Summary:PDF Full Text Request
Only after passing the test can integrated circuits become real products and enter the market.At present,the common test methods for integrated circuits at home and abroad include ATE test,which has the advantages of fast test speed and high coverage,probe card test,which has the advantage of saving packaging cost,and BIST circuit test,which has the advantage of little dependence on test instruments.But these tests have a common drawback: they are expensive,which would raise research and development costs.In order to reduce the test cost of integrated circuit and popularize the miniaturization of test instrument,a test system based on FPGA is introduced.In this paper,an FPGA-based chip test system is designed for OCTA NOR Flash chip.This tests system covers three interface modes of OCTA NOR Flash chip,namely,the traditional SPI mode(single-port input,single-port output),STR-OPI mode(Single Transfer Rate OPI,transmitted along the 8 I/O port),and DTR-OPI mode(Double Transfer Rate OPI,Double edge 8 I/O port).The test clock frequency reaches the highest working frequency of the chip,104 MHz.The highest bit rate is 1.664 Gbps(Bit Per Second).This paper focuses on the following aspects:1.This paper discusses the important status of NOR Flash in integrated circuits,the methods of testing Flash at home and abroad,and the basic testing principles of memory,including all kinds of memory classification,NOR Flash architecture type,storage unit structure of non-volatile category,basic operation mode of NOR Flash,structure and access command of OCTA Flash chip.2.This paper puts forward the feasible structure of the test system.Overall structure includes the upper computer,USB2.0 interface,FPGA and the chip under test.The upper computer makes test intuitive.USB2.0 interface has fast transmission speed,and it supports hot plug.FPGA can send stimulus to chip under test,and it can achieve a variety of algorithms.And the chip under test directly connects to the FPGA's pins.The hardware circuit of the system is designed and the structure of the hardware circuit is introduced.The hardware includes power supply,FPGA minimum system and USB2.0control circuit.3.The software part includes upper computer and Verilog code.The upper computer is designed by Lab VIEW.According to the test requirements,Verilog code includes nine modules,which are USB read-write module,FIFO module,OCTA Flash chip instruction module,SPI interface module,STR-OPI interface module,DTR-OPI interface module,counting "1" number module,mode selection module and LED lamp indicating module.4.Finally,the function and performance of OCTA NOR Flash are tested on the system.The advantages of using FPGA test system are: saving time in communication with testing vendors and test cost,strong versatility,easy maintenance and intuitive test.
Keywords/Search Tags:OCTA NOR Flash, FPGA, chip test, USB2.0, LabVIEW
PDF Full Text Request
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