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Design And Implementation Of Portable Flash Test Platform Based On FPGA

Posted on:2020-07-14Degree:MasterType:Thesis
Country:ChinaCandidate:K ZhaoFull Text:PDF
GTID:2428330602452533Subject:Engineering
Abstract/Summary:PDF Full Text Request
As an important part of the commercial IC production,chip testing plays an increasingly important role in reducing chip production costs,shortening the design cycle and maximizing benefits.With the deepening of global informationization,Flash memory has developed rapidly in the mobile phone,Internet of Things,big data and other industries with its characteristics of high density,low cost and high reliability.With the continuous progress of So C technology and the development of semiconductor technology,Flash has become more and more popular.Products need to be tested in batches before they leave the factory to ensure that the memory can work effectively and correctly for a long time.However,with the increasing function of Flash,the scale of internal logic circuit is becoming larger and larger,and the production process is shrinking,which brings great challenges to Flash testing.If a suitable test platform can be designed to ensure the fault coverage of Flash testing,it will greatly improve the speed and efficiency of Flash testing,improve the yield of Flash products,reduce the cost of chip production,and bring great convenience to the whole test work.In this paper,through the study of the implementation method of the Flash test platform designed in the past,it is found that many Flash test platforms can only test a single type of Flash,but can not be compatible with other types of products.In this paper,in order to solve this problem and make sure that the test platform does not need to modify the code of the test platform when testing other Flash so that a large number of configuration registers are designed inside the test platform to enable the test platform to support external configuration of some parameters inside the platform.With this design method,only the platform configuration is completed according to the chip to be tested before the chip test,which greatly shortens the development cycle of Flash and improves the testing efficiency of Flash.In addition,the test platform supports the use of JTAG protocol to download test instructions at one time,which greatly simplifies the test process and effectively shortens the test cycle.Based on the in-depth study of the structure and working principle of Flash,and the function and fault model of Flash,this paper analyses and compares the advantages and disadvantages of various Flash test algorithms.According to the experience of previous Flash test platform design and actual needs of the test operation,the design scheme of portable Flash test platform in this paper is proposed.By using Verilog language,the functions and internal timing of each module of the test platform are realized,including the design of test flow control module,interface circuit,instruction transmission and error information storage module,as well as the design of test instructions and the portability of the test platform.In order to ensure the reliability of the test platform designed in this paper,this paper strictly follows the process of verification of FPGA application.Through the verification platform based on UVM to test whether the test platform functions and test instructions can be achieved,the verification results show that under the simulation software,the function of the test platform is correct and the test instructions are correct.Finally,the test platform code is burned into the FPGA based on VIRTEX5(XC5VLX50T).The test platform is built and the parameters of the test platform are configured according to the timing requirements of 128 M bits Nor Flash of the 90-nm cumulative process of the test station.Finally,the test of the memory under test is completed.In the whole test work,eight pieces of 128 M bits Nor Flash were tested,of which two pieces of Flash were completely functional and two pieces of Flash could not work properly.The remaining pieces of Flash found the wrong page address through the actual test and completed the repair of the storage sector.The test results show that the test platform designed in this paper can achieve its functions,the test instructions are correct,and the test platform can be compatible with the test of Flash through parameter configuration.It shows that the design framework of the portable test platform for Flash in this paper is correct and the design scheme can be realized.
Keywords/Search Tags:FPGA, Flash memory, fault model, test algorithm, portable
PDF Full Text Request
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