Research And Design Of A Capacitor-less LDO In Response To Extremely Fast Load Changes

Because the traditional LDO(Low Dropout Regulator)has a large Out-of-chip capacitance,it can not be combined with the development trend of on-chip system(SoC),so the non-out-of-chip capacitor LDO has become the mainstream of current development and application.Compared with traditional LDOs,non-chip capacitor LDOs have design challenges in loop stability and transient response characteristics due to the lack of large output capacitance.In the application of SOC,there are many circuits that need power supply to provide a large current in a very short time,which puts forward higher requirements for the design of off-chip capacitor LDO.This paper studies the design of an off-chip capacitor LDO for very fast load change applications.Firstly,based on the calculation and analysis of LDO transient response process,NMOSFET is used as power transistor to improve response speed and limit the output undershoot and overshoot amplitude under the condition of extremely fast load change.In order to ensure a suitable voltage margin for NMOS power transistors,a high precision frequency tunable oscillator with integrated charge pump and clock signal for charge pump is designed.Secondly,the error amplifier is realized by differential gate coupling.Dynamic bias and static bias are combined to save power and improve efficiency,and to obtain higher system bandwidth and voltage swing rate.At the same time,the low-frequency main pole of LDO loop is set at the gate of power transistor to improve bandwidth.Thirdly,a fast transient response path is introduced through capacitively coupled high-speed dynamic signals.When the load transient change speed is greater than or far greater than the LDO bandwidth,the AC signal from the LDO output terminal is directly fed into the power transistor drive circuit,which greatly improves the LDO transient response speed.Based on Huahong 0.11?m 5.5V high voltage CMOS process,the circuit design and Simulation of the prototype chip are completed.The simulation results show that the input voltage range is 2V~5V and the output voltage is 1.5V in the range of-25? ~ 125?.The lowest static current consumption is 86?A in typical cases.The better transient response characteristics are obtained under the extremely fast load change(50 ?A~50 mA@100ps).The maximum output voltage is 466 mV under-impulse and the output voltage is 333 mV up-impulse.