Development Of PXI Express Intermediate Frequency Digitizer

The rapid development of wireless communication technology has promoted the widespread application of software radio technology in the field of wireless communication.Due to the limited development level of integrated circuits and the high cost of directly sampling RF signals using high bandwidth and high sampling rate ADC devices,the requirements for IF digitization technology are increasing.In addition,the current IF digitizers on the market have to be used with the supporting software and hardware platforms,and there is a certain technical blockade.These IF digitizers are difficult to extend and develop deeply.In view of the above problems,we develop an IF digitizer based on the band pass sampling theory,which realizes the digitization of the IF signal and meets the requirements of the generalization of the hardware and software interface of the IF digitizer and the complete reconfigurability of the firmware.Firstly,we introduce and analyze the key technologies involved in the IF digitizer.The main technical indicators are determined according to the functional requirements of the IF digitizer,and the overall scheme design of the IF digitizer is completed.For the hardware design of the IF digitizer,the AD9690 single-channel ADC chip and the HMC7044 high-speed clock chip are used to sample the IF signal.The dual-transformer single-ended to differential circuit is designed to complete differential conversion of the IF signal.Two 512 MB DDR3 memory particles are used in high-speed data buffer of the IF digitizer;the XDMA IP core is used to complete high-speed data transmissio.In the firmware design of the IF digitizer,the high-speed data receiving module completes the register control of AD9690 and HMC7044 and the reception,de-frame and unpacking of digital data from JESD204 B interface.the high-speed data buffer module completes the DDR3 SDRAM reading and writing control logic based on the MIG IP core.High-speed data transfer module completes PXI Express data transfer logic based on XDMA IP core.Therefore,the development of the IF digitizer is completed,and the sampling,buffering and transmission functions of the IF signal are completed too.Finally,the function and performance of the IF digitizer were tested,including Total Harmonic Distortion,Spurious Free Dynamic Range,Signal-to-Noise Ratio,Signal-to-Noise Plus Distortion Ratio,and Effective Number of Bits,and the JESD204 B interface protocol and bandpass sampling theoretical were completed on hardware platform verification.