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Research Of Configuration Information Generation For Heterogeneous Reconfigurable Processors

Posted on:2017-06-14Degree:MasterType:Thesis
Country:ChinaCandidate:Y C LiuFull Text:PDF
GTID:2428330590469349Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
Strong demand for computing in information age leads to the development of reconfigurable computing.Coarse-grained reconfigurable architecture(CGRA)combines flexibility of general purpose processor(GPP)and high performance of application specific integrated circuits(ASICs),thus become popular in research and technology area.Only with an efficient task compiler to manage hardware resource and schedule software tasks,can CGRA be powerful in dealing with parallel computing.In this paper,faced to a new multi-layer heterogeneous CGRA,we build a set of specification for configuration information which runs on reconfigurable processing unit parallel and develop a task compiler back-end called GRVM.By recognizing parallel marks added by compiler front-end and analyzing compiler intermediate representation(IR),GRVM split the whole task code into serial parts and parallel parts and extract useful information to build configuration information afterwards.Later on,following the theory of software pipeline and modulo scheduling,we schedule configuration nodes on processing element arrays(PEAs)to generate binary code which can be recognized by the processor.During the process of extracting configuration information from IR,we develop a storage structure named ConfigIR to store configuration information in the format of nodes.The application of ConfigIR isolates the development of reconfigurable architecture and its task compiler,which makes the design of hardware and software independently,increasing the efficiency of parallel development eventually.Targeting the unique mechanism of visiting memory in the processor,we optimize the data flow graph(DFG)of configuration nodes based on the structure of ConfigIR in order to map them into PEA eventually.By verifying several classic algorithms on a C-simulaor and an ESL platform,the specification for configuration information proves to be effective.On the other hand,GRVM can generate validate configuration information nodes for 10 computation-intensive algorithms,which proves the effectiveness of GRVM.
Keywords/Search Tags:reconfigurable computing, reconfigurable processor, compiler back-end, configuration information, modulo scheduling
PDF Full Text Request
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