A Compilation And Optimization Technology Of Configuration Information For Coarse-Grained Reconfigurable Processor

Reconfigurable processor has become a hotspot because of its combination of high efficiency of ASIC and high flexibility of traditional general-purpose processor.Because it uses a different hardware structure from the traditional processor,making the existing compilation techniques need to be improved to take full advantage of its hardware.This paper proposes a set of configuration information compilation and optimization techniques for coarse-grained reconfigurable processors and implements the compiler on the LLVM framework.The compiler can automatically extract operations from the Kernel function written in highlevel language,and then legalize and optimize the operations.For different loop structures,the compiler will take different strategies to take full use of the hardware considering the features of the coarse-grained reconfigurable processor and the loop.The compiler's programming language is based on C with some changes and the programmer does not need to know the details of the parallel computing.The compiler is responsible for parallelcomputing optimization which simplifies the difficulty of programming.The compiler automatically compresses the configuration information which reduces the size and number of configuration pack,reduces the cost of reconfiguring and improves performance.According to the simulation results of the typical algorithm selected from EEMBC,the performance of the configuration information generated by the compiler automatically can reach 92% of that which manually optimized,and can the speed-up ratio can reach 8.82 when compared with the traditional serial processor at the same frequency.In conclusion,the compiler and optimization methods can meet the requirements of compiling for coarse-grained reconfigurable computing.