Font Size: a A A

Design Of The Compiler Back-end For Reconfigurable System REmusII

Posted on:2012-09-18Degree:MasterType:Thesis
Country:ChinaCandidate:X LiuFull Text:PDF
GTID:2218330362459826Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
Reconfigurable Processor is a new type of processor. It generally contains one Processor and one Reconfigurable Logical Array, and has great advantages in flexibility, performance and power consumption. For most of the compute-intensive operations in Video processing,Reconfigurable Processing can change its architecture to complete different functions of different operations.Based on a coarse-grained Reconfigurable Processor called Reconfigurable Multi-media System (REMUSII), this paper designs the compiler for it. REmusII Compiler is to transfer Data Flow Graph (DFG) information of a compute-intensive operation into context information, and create the inferface file for the information. To further improve performance of the partitioning, Particle Swarm Optimization and Scheduling Algorithm (PSO) is introduced to solve the problem, which is named PSOTP.After simulation on REmusI system, results show that PSOTP brings much better performance than the classical Optimization algorithm like ALAP, ASAP, LIST and Priority based List Optimization. Its performance is close to that of SA, but it cost less time to get the optimal solution.
Keywords/Search Tags:Coarse-grain, Reconfigurable, Task Compiling, Temporal Partition
PDF Full Text Request
Related items