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Research On Embedded Reconfigurable DSP Architecture

Posted on:2006-08-02Degree:DoctorType:Dissertation
Country:ChinaCandidate:R DuanFull Text:PDF
GTID:1118360212467701Subject:Computer application technology
Abstract/Summary:PDF Full Text Request
The better computing structure matches with the application algorithm, the higher performance and efficiency can be got. The matching requires the processor's capability to reconstruct its structure according to the requirements of the applications. Reconfigurable computing has the flexibility of software and the efficiency of ASICs, which is a new and promising direction of computer organization development. The combination of DSP processors and reconfigurable computing technology has the promising potential to improve the single DSP processor performance to a higher level.Based on Natural Scientific Funds (60273088) and National Defense Fundamental Research Projects (41308010307 and k1800060504), the thesis gives an in-depth study on high performance reconfigurable DSP processor. Based on the accomplishment of "Control-enhanced general-purpose programmable DSP, LongTeng D1", we have studied the reconfigurable LongTeng DR model and its micro-architecture systematically. A simulation model is also constructed. The simulation result indicates that LongTeng DR can improve the performance of a single DSP processor in a broad range of DSP applications. The main research works and creative contributions of this dissertation are:1. The general-purpose programmable DSP processor, LongTeng D1 has been designed based on the in-depth research of DSP applications and processor architecture. The LongTeng D1 DSP soft core can operate at 150MHz under TSMC 0.25um CMOS technology. It integrates 320,000 transistors and has been successfully applied in a MP3 audio processing application.2. A reconfigurable DSP processor model, LongTeng DR (DSP Reconfigurable) is proposed based on the characteristics of Control Data flow of DSP algorithms and the adaptability of reconfigurable architectures. The address generation units and data-path of LongTeng DR can be reconfigured according to the address calculation streams and data calculation streams of the Data Flow Graph, making the processor more adaptable and better performance.3. A micro-architecture is proposed according to the LonTeng DR model. The architecture adopts the switching mechanism between the control mode and the reconfigured mode, reducing communication overhead greatly. Compared with...
Keywords/Search Tags:Reconfigurable computing, DSP processor, Configuration, Mapping, Speedup
PDF Full Text Request
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