Research And Simulation For The Method Of Integrated Circuit Testing

With the development of the semiconductor industry,Integrated Circuit becomes more complex,so the cost and difficulty of IC test become higher and higher.How to reduce the cost of testing of integrated circuits is very importance and necessary for the IC industry development.There are two ways can help us to achieve this goal,one is efficient testing method and the other is auto test equipment(ATE).So research on IC testing not only has important theoretical significance,but also has practical value.Firstly from the internal aspects of IC testing,this paper introduce current testing principle,method and technology.Test vector generation is a very important part in the IC testing,so we focus on various methods of test vector generation,and compare their advantages and disadvantages.By improving fault coverage,reducing the time of test vector generation,we can shorten the test cycle and reduce cost of test.Meanwhile due to the integrated circuit DFT let difficult and complex testing process becomes simple,boundary-scan and BIST technology are widely used,so we do in-depth research on the above two techniques and propose one application programs to improve the circuit testability by using mixed-signal chip which supports the IEEE1149.4 standard.Next from external aspect impacting IC testing---Auto test equipment(ATE),as the main research focus of this paper,firstly for the overkill phenomenon caused by the ATE during the IC testing,we study focus on the ATE system noise that impact IC testing in different test frequency range.Through simulation and experiments to provide a theoretical and practical basis for how to choose appropraite ATE with noise floor that can meet chip testing requirement in the low-frequency test and how to select an appropriate low-pass filter circuit test by better observation of spurious noise result in high frequency.Secondly to improve the ATE test efficiency and reduce testing costs,based on the analysis of traditional linear and binary search algorithm,then provide Adaptive Range Setting Search Method.For transaction points searching during the test,Adaptive Range Setting Search Method can narrow down the search range adaptively without hurting the search resolution.Simulation with field data shows about 50% test time savings with this new adaptive search test.The greater the amount of search tests and the wider the original search range,the more efficient this algorithm becomes.Finally,due to the 3D IC technology currently is recognized as the one of the most effective way to continue Moore's Law,by analysis V93000 ATE equipment to show V93000 how to cope with the future 3D IC test challenges.