Design Of 0.18?m CMOS 16KByte Hardened SRAM Memory

With the development of science and technology,integrated circuit technology has been widely used in electronic equipment and has become a part o f production and life.Memory is an important component in electronic equipment,and static memory(SRAM)plays a key role in memory design.The increased reliability of electronic devices has made the study of radiation technology more important.In conclusion,it is necessary to study the anti-radiation memory.In this paper,the design of 16 Kbyte hardened memory is completed by using SMIC 0.18?m process.Paper first discusses the common radiation effect and its corresponding common reinforcement methods,and according to the different size of memory design method and the design of the memory determines the overall architecture of memory and timing.The memory unit of DICE memory was selected,and the memory array was proved to have the ability to resist SEU through simulation.Then according to the requirement of memory,the peripheral circuit with certain anti-radiation capability is designed,including decoding circuit,clock generating circuit,sensitive amplifier,input circuit and output circuit.Compared with the traditional peripheral circuit,the design of memory peripheral circuit is completed.Finally,the whole SRAM memory simulation was carried out to determine that the memory design function was correct and the overall design met the requirements.After finishing the circuit design thesis expounds the layout design of SRAM memory,adopt the way of adding ring complete resistance to th e function of the SEU and TID.IO was added to facilitate chip testing.Finally,the layout design was completed through layout verification and simulation after layout.The access time of the memory is 3.216 ns and the power consumption is 35.31 mw.After complete physical model on the kernel memory and timing information extraction,and complete the logic synthesis and layout work,prove the correctness of the proposed the physical model and temporal information,complete the design of SRAM memory.