Design Of Radiation Hardened Integrated Circuit Based Silicon On Insulator Process

CMOS integrated circuit will affected by the total ionizing dose effect (TID) and singleevent effect (SEE) when they working in the space. The radiation effect performances for thesemiconductor devices are as follows: the logical function mistaken, the threshold voltageshifted and the static and dynamic current increased, et al. Therefore, the normalsemiconductor device and circuit design method can no longer meet the requirements ofspace and military application, and it needs special radiation hardened techniques.In circuit, silicon on insulator (SOI) is a kind of technique to manufacture semiconductordevices, its radiation hardened ability is better than the normal bulk silicon CMOS device, butit also affected by the radiation when the devices worked in space. So we still need toimprove the radiation hardened ability of circuit by the way of circuit design menthod.This paper based on0.18μm SOI process to design of a embedded16K SRAM circuit,we design the SRAM circuit from the two aspects just like the circuit and the layout, the maininnovation points are as follows:(1) In the design of memory circuit, the double interlocked storage cell (DICE) is usedas a storage unit; in the design of peripheral circuit, the address translate detector (ATD) isused to increase the stability of the SRAM circuit, also to improve the single event upset(SEU) radiation hardened ability of the SRAM circuit.(2) In order to improve the single event effect (SEE) radiation hardened ability of theSRAM circuit, added the error detection and correction circuit (EDAC) which often used inthe design of bulk silicon circuit as the reinforcing as a backup,.(3) Using the structure of big gate device in the SRAM layout design, the total ionizingdose effect (TID) radiation hardened ability of SRAM circuit has increased from50k rad (Si)to150k rad (Si) above.A embedded16K SRAM circuit is designed with the0.18μm SOI process, afterradiation test, the parameters of radiation hardened of SRAM are as follows: TID≥150k rad（Si）, SEU≥37MeV·cm2/mg, SEL≥75MeV·cm2/mg, the static current is80uA, thedynamic current is45mA, the read time is10ns.