Design Of Frequency Synthesizer Based On Phase-Locked-Loop

Rapid development has been achieved in RF wireless transceiver field over the past ten years.Transceiver is widely used in all aspects of life.At the same time,the higher communication requests are put forward to the integrated circuit design.A local oscillator is needed for signal processing in radio front-end.And frequency synthesizer is the module that generates the accurate local oscillator signal.The frequency synthesizer is indispensable in radio frequency system,and its performance decides the quality of communication directly.Therefore,high-integration low-power wideband frequency synthesizer has an important application value in transceiver chip.In this thesis,the frequency synthesizer based on PLL is analyzed.The modules of oscillator,charge pump,phase-frequency detector and frequency divider get optimized separately.A high performance frequency synthesizer is achieved by improving system parameters like area,bandwidth and power consumption.The core chip area is 0.06mm²and the power consumption is only 3mW.In this paper,basic principles and main parameters of frequency synthesizer are introduced.The ring oscillator is designed according to some relevant literature.And constant transconductance operational amplifier,which enlarges the tuning range of oscillator,is improved by voltage shifting,current control and current source feedback structures.A constant transconductance is realized in the 0-V_DD voltage range.Solutions have been proposed for charge pump current mismatch problems that can easily cause output spurs.The resistor feedback and bias feedback structures enable the current to be matched over a wide voltage range.And there are a brief introduction for phase-frequency detector and divider,too.Feasible structures that can meet design requirements of frequency synthesizer are proposed.All the designs in this paper are based on Cadence simulation environment.The schematic and layout design is completed based on SMIC40nm CMOS technology.And the simulation results prove the feasibility of my design.