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The Design Of Hybride Encryption Module In Network Processing Unit

Posted on:2018-09-24Degree:MasterType:Thesis
Country:ChinaCandidate:Y YangFull Text:PDF
GTID:2428330545964311Subject:Engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of technology,such as cloud computing,mobile Internet and Internet of things,the asmount of network data is exploding.The network security issues have attracted more attention under such circumstance.The high-speed network processor based on network security protocols meets the need of high-speed security network.The hybrid cryptography combines the advantages of the public key cryptography algorithm and the symmetric cryptography.It has been applied to some important network security protocols.In this paper,the hybrid encryption module which processes AES(Advanced Encryption Standard,AES)and RSA(Rivest Shamir Adleman,RSA)algorithm is applied to the network processor.The hybrid cryptography is analyzed in this paper at first.It is proved that AES key extension,AES encryption and RSA encryption of the AES-RSA hybrid cryptography can be processed step by step,which is advantageous to logical multiplexing.After the similar logic in AES and RSA circuit summarized,the reconfigurable processing uint is designed,including reconfigurable multiplication,addition,S-box,shift,interconnection and other processing subunits.Circuit area can be saved through implementing AES key extension,AES encryption and RSA encryption in a reconfigureable circuit.An application specific control circuit including three modes for AES key extension,AES encryption and RSA encryption is designed outside the processing unit,which can make processing unit switch mode fast.The RTL(Register Transfer Level,RTL)description of the hybrid encryption module is completed.A simulation platform and FPGA(Field Programmable Gate Array,FPGA)platform is built for functional simulation and board-level verification.It is proved that the module can correctly complete AES and RSA encryption and decryption tasks.Finally,this paper synthesizes the module with SMIC 65nm technology library under 250MHz clock constraints,and the area is 263480 ?m2,And the module can compute AES algorithm and RSA algorithm with the throughput rate 2.56 Gbps and 134.1 Kbps under this circumstances.It is area-saving and can switch algorithm fast.The hybrid encryption module designed in this paper can be integrated to network processor,because it satisfies all the design specifications of network processor.
Keywords/Search Tags:Network Processing Unit, Hybrid Cryptosystem, AES, RSA, Reconfigurable Computing Unit
PDF Full Text Request
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