Oriented Multimedia Coarse-grained Reconfigurable Processing Unit Of The Structure

The increased use of multimedia applications has significantly increased the computing demands placed on processors. Reconfigurable systems, which allow configuration of the reconfigurable processing unit in order to meet the specific computational requirements of different applications, combine the extreme of ASIC's efficiency and general-purpose processor's flexibility. Furthermore, multimedia applications stress integer arithmetic on word-organized data and thus benefit from a coarse-grained architecture.The thesis proposes "Longtium-DSRU" (Domain Specific Reconfigurable Unit), a coarse-grained, efficient, flexible, reconfigurable array coprocessor model, targeted at multimedia applications' 3 groups of basic computation structure: FIR, FFT and dot-product. The research work of this thesis mainly includes:· Propose "Longtium-DSRU";a model targeted at multimedia applications with inherent data-parallelism, high regularity, and computation intensive requirements. The "Longtium-DSRU" model couples a multi-context, coarse grained, Crossbar network, and VLIW computation array as a coprocessor to a CPU core.· Design the architecture of reconfigurable ALU, which could perfectly match the multimedia applications' 3 groups of basic computation structure: FIR, FFT and dot-product.· Design the configurable Crossbar network and local memory, which could buffer data and communication with each unit flexibly.· Adopt two levels configuration logic, which reduces the number of control signals from 984 to 6. In the first level, it uses configuration register files to configure the data path of "Longtium-DSRU";in the second level, it uses decoder RAM to configure the configuration register files.· Research of some important algorithms (FIR, FFT and dot-product) mapping on the "Longtium-DSRU" model. The operands' bit-reversed addressing method is avoided in the mapping of FFT algorithms, and it could realize 1024-point complex number FFT operation in the most.· The prototype of "Longtium-DSRU" model is implemented on FPGA. Logic synthesis is done under SMIC 0.18μm CMOS technology. 1024-point complex number FFT can be accomplished in 64.5μs, under the frequency of 40MHz. By evaluating the performances of "Longtium-DSRU" model, it is believed that it could satisfy the computational requirements of multimedia applications.