Research On Aging Fault Protection System In Digital Integrated Circuits

In the 21 st century,semiconductors have been closely associated with our lives.Microelectronics technology has also become an integral part of our lives.It is the foundation from the home computer,home cell phone,to the medical field,military field,aerospace field.As the integration level of VLSI increases,the process size decreases,aging caused by negative temperature bias instability,and soft errors caused by bombardment of circuits by high-energy particles have become important factors affecting circuit reliability.The paper introduced the development of integrated circuits over the past decades and the application of digital integrated circuits in life firstly.Then introduced two major issues that affect the reliability of integrated circuits,mainly circuit aging and soft errors.Previous researches on circuit aging include aging detection and aging prediction.The thesis describes these two aspects,analyzes the working principle of aging detection and aging prediction,and compares their advantages and disadvantages respectively.This thesis analyzes several classical sensors put forward by previous researchers and finds out that the soft error protection problem for weak nodes is rarely studied.Therefore,a soft error aging prediction sensor based on dual mode redundancy is proposed.This new type of sensor duplicates key nodes through dual-mode redundancy technology and performs fault protection through the C unit,so that the modified structure can accurately predict aging not only under normal working conditions,but also when high-energy particles bombard the circuit and critical nodes appear.In the case of soft errors,it is still possible to make an accurate judgment of whether the circuit is aging.The thesis also proposes a low-power and robust predictive aging sensor.Under the premise that the sensor can predict the aging of the circuit,the sensor has serious aging for the combinational logic circuit,that is,the trigger can no longer received the correct signal,the circuit is protected against fault tolerance.The sensor compares the combined logic signal in the guard band with its reverse delay signal to determine if the circuit has experienced premature aging.The post-detection band signal is detected and the fault-tolerant unit is controlled by the final sensor output signal.If the circuit is severely deteriorated,the error signal received by the trigger can be corrected by the fault-tolerant unit.Finally,in order to verify the feasibility of the proposed two sensor structures,simulation software was used to simulate the proposed structure to simulate the different detection results of the sensor under the condition of unaged circuit and aging.When the combinational logic circuit has severely aged,the analog sensor corrects the error signal received by the trigger.And through the way of soft error injection to the nodes to simulate the soft error situation of the sensor key nodes.The simulation experiment proves that the two structures proposed in this thesis can accurately predict the aging of the circuit,and propose that the protection soft error sensor can protect the soft errors occurring in the vulnerable nodes.In addition,the proposed low-power,high-robustness sensor can correct the error signal detected by the flip-flop.Compared with the sensor proposed by others,the structure of this thesis is more advantageous in terms of both area overhead and power consumption.Area overhead is smaller and power consumption is lower.