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Study For Aging Prediction And ESD Protection Of Integrated Circuits

Posted on:2014-03-04Degree:MasterType:Thesis
Country:ChinaCandidate:Y B LiuFull Text:PDF
GTID:2268330401988787Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
The technology of Integrated Circuits has been developed according to thetrends of Moore’s law since it was created. The society has undergone tremendouschanges and people’s life has become more comfortable and easy for the rapidprogress of Integrated Circuits. The gate oxide of the devices gets thinner becauseof the scale of the process dimension as Integrated Circuits expanding rapidly.Therefore the devices are more susceptible to interference from externalenvironment which makes circuits more prone to problems. Meanwhile, thereliability of Integrated Circuits becomes more prominent for the shrinks of processdimension. So it is necessary to study the reliability problems of Integrated Circuitssince it has brought huge damage to the people’s life and military defense. Twoparts of the reliability problems of Integrated Circuits are discussed in the thesisdue to the wide range of the problems: aging prediction of the Integrated Circuitsand the defense electro-static discharge.Firstly, the aging mechanism of Integrated Circuits is analyzed in thedissertation to find the method for detecting the aging of Integrated Circuits. Acircuit structure of predicting aging is put forward in this part. The correctness ofthe proposed structure is verified by using Hspice software through simulation andtiming analysis. The proposed circuit has great advantage at the aspect of thepower and the delay compared with the previous structure.Secondly, the research on the problem of electro-static discharge for IntegratedCircuits is discussed. The damage mechanism of ESD is analyzed to deeplyresearch the two kinds of circuits for ESD protection on the base of diode andGG-NMOS. The temperature characteristic curves and the clamp voltages for thetwo kinds of ESD protection circuits are obtained through simulation usingISE-TCAD. The simulation proves that circuit for ESD protection based onGG-NMOS has better performance compared with the circuit using diode for ESDprotection.
Keywords/Search Tags:NBTI (Negative Bias Temperature instability), aging prediction, ESDprotection, GG-NMOS
PDF Full Text Request
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