FPGA-based Circular Array Radar IF Target Simulator

The radar target simulator is used to generate the target echo signal,and its real-time simulation generates the target with distance,speed and angle information with white noise to effectively test and verify the radar.Combined with practical application background,this thesis studies an IF(intermediate frequency)target simulator for circular array radar based on FPGA.First,this paper introduces the design of the target simulator and the main theory of the echo generation,which is verified with Matlab.Then it illustrates the design of hardware and software,which ensures the synchronization of the multi-channel data output..The next,the FPGA implementation of the target simulator is described in detail,including the design of C code of PowerPC and the Verilog logic code.Finally,the hardware debugging of the target simulator is carried out,and the author analyzed the debugging results of the clock module,the network interface module and the DAC module.It is proved that the output channel signals are synchronized and the phase is the same.After joint debugging of the circular array radar and the radar target simulator,followed by radar signal processing,the radar displays the output of the target simulation results on its terminal interface.Via the validation by radar,the FPGA-based circular array radar IF target simulator is proved to have a relatively complete simulation capability of goals,and a scientific hardware design to ensure the follow-up function expansion and scale upgrading.The thesis provides a fine and fundamental technological basis for future researches.