Design And Research Of Digital Circuits Based On Near-/Sub-threshold Standard Cell Library

With the development of integrated circuit process technology,the process dimension to pursue high integration and high speed,the biggest problem caused by this is that the continuous increasing of power density,which has gradually become the most critical factor limiting the development of integrated circuits.In recent years,popular applications such as wireless sensor networks,medical electronics,and portable consumer electronics have become increasingly demanding for low power consumption.Low-power technologies have become the focus of research in the industry and academia.As a low-power technology that can linearly reduce leakage power consumption and reduce power consumption quadratically,extremely low-voltage technology is widely studied and adopted.A large number of studies have shown that the system obtains the lowest energy consumption when the supply voltage is near the threshold voltage of the MOS device,the near/sub-threshold digital circuit design technology has rapidly emerged and developed,and has become an important research direction in the field of low power consumption.First of all,this article analyzes the necessity and important research significance of low energy circuit design from the development course of integrated circuit and market demand.Secondly,based on the characteristics of CMOS integrated circuits,this paper analyzes the composition and influencing factors of circuit energy consumption,and the theory of minimum energy consumption point is derived.As the core basis theory of the near/sub-threshold circuit design,the minimum energy point theory perfectly explains the important research significance of the near/sub-threshold technology.Then,the characteristics of MOS devices and cell circuits at very low voltages are studied in this paper,including cell performance degradation,increased mismatch of cell pull-up networks and pull-down networks due to increased NMOS/PMOS strength ratios,short-channel and reverse-short-channel effects,narrow-channel effects and reverse-narrow-channel effects,as well as temperature inversion effects.Finally,based on the study of cell library design technology,this paper designs a complete set of sub-threshold digital standard cell library with 0.4V power supply using 180 nm standard CMOS process.The design process includes process research and design,cell design and physical implementation,library file extraction,and cell library validation.A new cell size design strategy combining traditional channel width adjustment and gate-length biasing is proposed to effectively enhance the PMOS transistor driving and reduce the leakage current.Therefore,the stability of the library cell is improved.The ISCAS benchmark test circuits are used to validate the sub-threshold standard cell library.Compared with the commercial library,the sub-threshold standard cell library reduced the power consumption by more than 20% at the same voltage.In addition,16-bit multiplier and FIR filter circuit are implemented based on the subthreshold library,which further validates the effectiveness of the cell library design method.