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Optimal Design Of Transistor Test Method Based On Powertech Power-tech Test Equipment

Posted on:2018-04-05Degree:MasterType:Thesis
Country:ChinaCandidate:J Q HeFull Text:PDF
GTID:2348330542978047Subject:Engineering
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With the tough competition of the semiconductor industry,especially under the pressure of cost,high quality products and lower manufacturing costs have become a prerequisite for the company's competitive success.In addition,the market has diversified the performance demand of semiconductor devices.Various kinds of semiconductor devices need to test more and more parameters,and the testing time is longer and longer.The testing time by using the existing test method has become a key factor that restricts the cost of product.At the same time,the test also increases to measure potential hazard parameters(reverse breakdown detection,high saturation current detection)from simple non-hazardous parameters(forward voltage,positive dc current,maximum current,etc.).How to add these undisciplined performance tests to the test program,which is also a great challenge for us to make it adapt to large-scale production and reduce the loss of qualified rate due to the test oscillation.According to the analysis on the current testing principle of transistor,this thesis gives some suggestions in view of the above problems to enhance the competitiveness of devices: Optimize some currently negative impact on testing accuracy.Detect and design a more logical test method to deal with test oscillation as also as the potential risk of our products.Testing cost is reduced by shortening test cycle and cancelling unnecessary test lower without at the expense of quality.The main contents coverage:1.The existing test method for transistors can't take into account the potential danger parameters.Design a back end testing method for transistors.It is divided into two steps and detection range.The electrical parameters are tested under the condition of the reverse breakdown and the large current making the product performance better after the test.2.A test method to eliminate oscillation of a transistor has been developed: Interference of internal resistance is reduced by increasing the resistance of the collector and thus improve the accuracy and stability of transistor breakdown test effectively,when testing the breakdown voltage between the emitter and the collector.3.The author analyze the testing principle of test machine QT-6000 POWERTECH on the electrical parameters of semiconductor devices,and the theoretical cycle required for each step of the process.The test time was optimized for the best by seeking a right combination of both theoretical test cycle and handler cycle.
Keywords/Search Tags:test oscillation, test time, potential danger
PDF Full Text Request
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