Design Of Wideband And Adaptive Bandwidth Phase-locked Loop Circuit Applied To TDC

The phase-locked loop(PLL)is widely applied in the occasions where the clock performances is critical because of its excellent clock performances.In the photon time-of-flight(TOF)measurement imaging system,the in-pixel time-to-digital converter(TDC)is the basic cell of TOF quantization.As the TDC's performances,such as time resolution and accuracy,are improving,the design of clock system suitable for TDC in large array application becomes the key of accurate TOF measurement and 3D imaging.In order to adapt the TDC's measurement for different application situations,this paper designed a PLL-TDC coupling system structure,which is suitable for TDC array application and can adjust the time resolution by changing the PLL's output frequency.Thus,it can make a good balance between full scale range and resolution,resolution and accuracy.The clock system of TDC adopted the wide frequency range,adaptive bandwidth PLL closed loop clock circuit,the voltage-controlled oscillator(VCO)is the ring oscillator compromised by four stages delay cells,to generate four-phase uniform clocks for low-level TDC fine discrimination.At the same time,the VCO contains multiple digital-controlled frequency bands,and the frequency bands are switched by the auto-frequency calibration(AFC)circuit,to reach a wide frequency range and low voltage-controlled sensitivity.In order to keep the loop stable and suppress the phase noise,this paper also designed a low current mismatch,good transient current characteristics programmable charge pump to adaptively adjust the bandwidth by the change of the division ratio N.Base on GSMC 0.18?m CMOS technology,the simulation,layout design and post-simulation to the circuit is conducted in the Cadence software situation.The design is verified by tape-out.The test result shows that the RMS TIE jitter of PLL output clocks is 6.5ps,and the phase noise is-113dBc/Hz@ 1 MHz when the output frequency is 200MHz,which can meet the design requirements.Due to the VCO bands switching failure,the output frequency ranges is limited and is 120MHz-320MHz,which has a difference with the design requiretment.The TDC test results is normal,under the frequency of 320MHz,the resolution is 0.4ns and the dynamic range is about 6?s,the DNL and INL are within the range of ± 2LSB.The quantization error and linearity change significantly at different clock frequencies,showing a high degree of dependence on clock performances.The wide frequency range,low-jitter and mufti-phase uniform clock system designed in this paper is suitable for high resolution and high precision TOF measurement to improve the quality of 3D imaging.