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Research On Single-event Transient Mechanisms And Several Relevant Factors In Nano CMOS Devices

Posted on:2017-03-15Degree:MasterType:Thesis
Country:ChinaCandidate:R R LiuFull Text:PDF
GTID:2348330536967640Subject:Software engineering
Abstract/Summary:PDF Full Text Request
In space environment,it is necessary to consider SET problems in order to prevent the integrated circuits(ICs)working in the space crafts or man-made satellites from the soft error due to radiation.As the scaling down of for the ICs,the supply voltage get lower and the working frequency become higher,which make SET more and more serious.The influences of the well contact area and the well depth on the Ics are analyzed in this paper in order to provide guidence for the radiation hardening of the ICs.The main results are as follows.The influence of well contact area on the PMOS SET pulse width in 65 nm CMOS process is analyzed using TCAD simulations.The simulation results show that increasing the well contact will broaden the SET pulse due to the pulse quenching effect,which is in contrast to the traditional point that increasing the well contact could effectively mitigate the SET pulse.Meanwhile,the tendency of this phenomenon under different incident particle LET values and transistor spacing is also analyzed.The contact structure should be designed and verified carefully to get the optimized radiation hardening ICs.Influence of junction depth,including N+-N,P+-P and PN,on the SET pulse width in 65 nm bulk devices is analyzed using TCAD simulations in this paper.It analyses the tendency of the influence of junction depths on charge collections and the mechanism.The variations of voltage or temperature are also considered.The mechanism of the influence of N+-N,P+-P junction depths on SET is different from PN junctions.While the former influences the parasitic bipolar amplification,the latter influences the carriers drift.The results indicate that N+-N junction plays the most important role in influencing the PMOS SET pulse width.Meanwhile,the difference of SET pulse widths is distinct in different voltages for N+-N and P+-P junctions as well as in different temperatures for PN junctions.Because voltage affects parasitic bipolar amplification a lot,while temperature affects drift a lot.Junction depth varies in different processes,Especially,as the scaling down of ICs,the influence of process fluctuantion is more and more serious.Thus,designers must consider the influence of junction depths to the radiation-hardening IC design.
Keywords/Search Tags:Pulse width, single Event Transient(SET), Well Contact Area, Junction depth
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