Research And Implementation Of Encoding And Decoding Algorithm For Low Complexity LDPC Codes

Channel coding is one of the most effective technologies to ensure reliability of communication systems.LDPC code is a theoretical and practical channel coding technique.It is concerned by more and more researchers because of its proximity to the Shannon limit.In the communication system which use LDPC code as channel coding,how to ensure the good performance and low complexity of LDPC coding and decoding part is an inevitable problem.In this paper,we will study the encoding and decoding algorithm and its hardware implementation from the point of view of low complexity.Firstly,study the existing theoretical framework of the LDPC code,including Tanner graphical representation of LDPC code,structure methods,encoding algorithms,kinds of hard and soft decision decoding algorithms,this lay a theoretical foundation for the follow-up study.Then,the performance of various soft and hard decision decoding algorithms and the influence of some decoding parameters on the performance are simulated.The study focuses on the derivation of soft decision algorithms.By gradually derived several classic simplified algorithms,we points out the reasons for the errors in the process of approximation and explores methods of compensating the errors.Secondly,after the derivation and analysis of the existing soft decision decoding,two improved soft decision decoding algorithms are proposed.The first one is INMS decoding algorithm which add different normalization factors before the minimum and sub-small values.The algorithm has a certain performance gain without lifting the complexity.The second is IEMS decoding algorithm which uses the noise variance estimating sub-small values.Then,IENMS algorithm combines the two improved algorithm above.Under the premise of reducing 2(log 1)rM ?d ?-? ? times addition operations,performance is lost slightly.If the performance requirements are not so strict,it can be widely used in high speed decoding.Finally,encoding and decoding based on(8176,7154)code which is recommended by CCSDS is implemented by hardware.After a detailed analysis of various encoding circuits of LDPC codes,a high-speed encoding method of seven bit parallel input is proposed according to(8176,7154)code.And the encoding hardware implementation is carried out in accordance with the modular concept.After a detailed study of various decoding frameworks,a partially parallel encoding circuit is designed according to(8176,7154)code.And the universal design of the memory module makes the decoder suitable for decoding multiple LDPC codes.