Research On Key Technologies Of Non-Volatile Memory Core For Passive RFID Tags

RFID technology is one of the top ten key technologies in the 21 st century, has been attentionned by many high-tech enterprises, research institutes and scientific research units of each country. Nonvolatile memory is the indispensable main modules in passive RFID tags, due to strict limit of the cost and power consumption. Researches on nonvolatile memory which compatible with standard CMOS process have sprung up with the development of RFID technology, today, nonvolatile memory which has the excellences such as ultra-low power consumption, high reliability, small area and so on is still hot spot of research.This paper is dedicated to design a ultra-low power consumption nonvolatile memory IP core suitable for passive RFID tags, through the research on the application background, we found that the project has a good application prospect and great research significance. This article take the design idea of from top to bottom, first of all, in order to reduce power consumption as much as possible, the word line segmentation technology has been used in the design of IP core application system architecture; EEPROM and FLASH structure has been discussed When designing the kernel storage unit block,and they are difficult to meet the passive RFID tag chip at the request of the power consumption and cost reasons. In this paper we put forward a kind of single layer type polysilicon floating gate memory cell; The key modules of the peripheral circuits of MTP have been made a detailed analysis in this paper, and put forward a new voltage switching scheme which solved the disadvantage of traditional voltage switch circuit that the voltage switch process of high voltage allways affected by the change of load capacitance seriously; We put forward a new kind of high voltage switch circuit, make its power consumption reduced to 1/108 of the traditional switch circuits; put forward a new kind of charge pump structure which can effectively improve the service life of the charge pump, and its intrinsic power consumption can be controlled in 489.8 n W, the voltage conversion efficiency can reach 90.28%; We apply the Bootstrap technology in the design of clock voltage switching scheme, and its power consumption is 1/7 of the traditional circuit, the burr is reduced 10 times; We put forward an adjustable high voltage regulating circuit that can effectively guarantee the accuracy of the high voltage after fabraction; Through reference on the principle of erase and programe of SRAM memory we have designed a high-reliability high voltage mark circuit; In this paper, we designed a small area, low power consumption LDO circuit, and the Line_Regulation as low as 0.03388%, the lowest voltage dropout as small as 0.019251 V, and the temperature Coefficient is 11.786 PPm. A new sensitive amplifier structure has been put forward, and it's average power consumption in a read cycle as low as 39.9 n W, and can effectively distinguish difference signal as low as 30 n A, and it has the best stability when the line capacitance or the power supply voltage are unstable, and it is not sensitive to the change of Angle of technology, it has enough high reliability to competent in the application of the RFID chip.