Non-volatile Memory Ip Functionality And Design

With the development of integrated circuit manufacturing process, characteristics dimension has reached the deep submicron level, and the chip integration enhances unceasingly. The processor, memory, analog circuits, digital circuits, interface circuits or RF integrated circuit chip on the composition of a large-scale SOC (System on Chip) has become the main direction for future integrated circuit design. In order to reduce costs, shorten the cycle of product launch, SOC (system level chip) usually adopts the design method of IP reuse, and embedded nonvolatile memory IP as the (system-level chip) indispensable part of the SOC design, its design result closely related to the ship's overall function.According to current SOC design for embedded system requirement status of nonvolatile memory IP, this paper mainly studied a nonvolatile memory IP design and implementation. In this paper, a general description of the development of IP is first given, and the nonvolatile memory and the fundamental principles, programming mechanism are introduced in detail. On this basis, proposes a sharing charge pump, and includes EEPROM and FLASH memory cells'non-volatile memory IP circuit. Then the whole framework of the IP is given, and design and simulate the voltage level switch circuit module, storage tube gate voltage circuit module and time-sharing multiplexing charge pump circuit and other key circuit module, at the same time analyzed the functions of Dummy cells in the memory cells layout and protection ring of high-voltage device, completed part of the circuit module layout and used Calibre software to do design rule check(DRC) and layout versus schematic(LVS) verification. In the end, a brief summary is given and the prospects for further work are proposed.