The Research Of Bit Synchronization Algorithm In Software Radio Based On FPGA

In view of the digital receiver of software radio requires that bit synchronization module has high efficiency synchronous data processing ability and can adapt to a wide baseband yards yuan rate range.The topic is based on the fully research of the principle of bit synchronization algorithm,the bit synchronization system based on software radio is studied and designed in detail in FPGA,the purpose is to improve the stability and precision of the bit synchronization system,greatly to reduce the complexity of the circuit module,and is easy to subsequent detect and improve.The improved design method is proposed to improve the efficiency of bit synchronization.The topic first studied the bit synchronization system of software radio in the related basic theory,including the principle of phase-locked loop,the principle of zero crossing detection principle and bit synchronization implementation method.Then,by comparing the advantages and disadvantages of these two common algorithms of Gardner algorithm and all digital phase locked loop algorithm,would use the all digital phase locked loop algorithm to design the bit synchronization system,and put forward the improvement on the basis all digital phase-locked loop bit synchronization algorithm.The design of this bit synchronization system module included five parts:digital phase detector,automatic variable modulus control,K variable modulus reversible counter,pulse addition and subtraction counter and N divider.The design of each module was also improved: On the basis of the K variable modulus reversible counter,the automatic variable modulus control was added to adjust the size of the modulus in real time,so as to improved the precision and speed of the bit synchronization system;Combined with the principle of pulse addition and subtraction counter,using VHDL language to improve the design to overcome the drawbacks of the traditional schematic design,reduced the complexity of the circuit,improved the accuracy of bit synchronization system;The N frequency divider was by the shift counter design,minished the synchronization error of the designed bit synchronization module and so on.Finally,combined with each module,the bit synchronization system was designed and simulated in QuartusII,the simulation results tested and proved theaccuracy and feasibility of the design.The test results showed that the improved bit synchronization system has a high efficient synchronous processing ability and is able to adapt to a wider baseband symbol rate,makes its have a certain generality.And on the basis of in meet the bit synchronization's time is short,the system reduces the overhead of a synchronous system,improves the precision and speed of bit synchronization system,especially in terms of speed increased by 3 times,enhances the performance of digital receiver in software radio,and optimizes the communication quality.