Design And Implementation Of High Speed Software Defined Radio Module Based On FPGA

Software defined radio is a new technology to solve the problem of various communication systems coexistence and inconsistencies standards in the field of wireless communication.It overcomes the shortcomings of traditional radio communication equipment,such as single function and poor scalability.It uses scalable and reconfigurable application software to achieve various functions of wireless communication devices.The characteristics of software defined radio mainly lie in its strong flexibility and openness.As one of the mainstream development directions of future communication technology,software defined radio technology has gained wide attention in various fields.In this paper,the power consumption,cost,compatibility,and practicality were considered in the design process.Xilinx's ZYNQ series ARM+FPGA architecture processor and ADI's AD9361 RF agile transceiver were selected to design a software defined radio module.The main research content includes the following aspects:1.For the problem of complex wireless communication channel and bad environment,this paper uses?/4-DQPSK as a modulation and demodulation scheme.Its spectrum utilization is high,and it has certain anti-jamming and anti-fading characteristics,which greatly enhances the stability of signal transmission.2.For the problem of the traditional digital receiver can not effectively adapt to excessive fluctuation of the received signal amplitude,this paper adopts the logarithmic loop AGC to automatically gain control the amplitude of the received signal,and the logarithmic loop AGC has faster convergence speed than other AGC loops,and occupying few hardware resources,has been widely used in practical projects.3.For FFT-based frequency offset compensation algorithm,it will occupy too much hardware resource when implemented in hardware.This paper uses Luise algorithm instead of FFT algorithm to achieve frequency offset compensation.Luise algorithm uses Cordic algorithm to calculate the radiation angle of received signal to estimate offset.The amount of hardware resources is greatly reduced.4.For Gardner bit synchronization algorithm can not be effectively adapted to the problem of multi-level modulation and demodulation,this paper uses an improved Gardner bit synchronization algorithm,which has higher computational complexity,but can effectively adapt multi-level system modulation and demodulation method.The bit rate of the module wireless communication designed in this paper is1.04Mbps,the radio frequency of the communication is 2.4GHz,the speed of the data exchange between the high-speed serial communication interface and the host computer is 5Gbps,and the BER?Bit Error Rate?is in the level of 10^-4.The communication quality of the whole module is good.