Research And Implementation Of SDR Bit Synchronization Algorithm Based On

With the rapid development of communications electronics industry, software defined radio(SDR), due to its good flexibility and extensibility, has become a hot topic in communication field. Its core is mainly to use a common hardware platform and to realize the corresponding function by loading with different functions of software module. Whether the bit synchronization, as a mainly part of the software defined radio, can accurately find out the best sampling points of the signal, will determine the performance of the software radio system is good or bad, and affect the communication quality. So the study of the bit synchronization system on the basis of software defined radio has a profound significance on wireless communication.This paper first introduces the development status and trend of Software Defined Radio. And then describes the effect of the bit synchronization in Software Defined Radio, and it’s development status and trend. Then introduces some algorithms which being used commonly, selects the algorithm that can be used in this paper called the algorithm of bit synchronization based on interpolation, during the time, choose the parabolic interpolation filter to be the interpolation filter and choose the Gardener algorithm to be the tool of error detector. When we analyses Gardner algorithm, we also put forward a kind of improved Gardner algorithm. Based on this, make out the whole plan of the system and make the related design of the main part of the bit synchronization. Then we also use a tool called MATLAB to simulate the whole system of Software Defined Radio, and compare the system with the bit synchronization with the system without the bit synchronization, at the same time, we compare the effect between the Gardner algorithm and the improved Gardner algorithm to the synchronization of the system. Finally, we use the Quartus II software to code by Verilog HDL to achive the system designed this time and reach the goal that make the bit synchronization successfully on FPGA. And use the Signaltap II carried by the software itself to logic analyse the system after coded on line.The improved Gardner algorithm put forward by this paper can solve the old Gardner algorithm’s weakness that can’t detect the timing error value when send the symbols that the adjacent place is the same sign bit, as a result, the efficiency of the system will be speed up when the system is working. The result by the Matlab simulation shows that the improved Gardner algorithm is faster than the Gardner algorithm in the course of recovering in Software Defined Radio, and verifys the correctness of the system, and is full of application value.