The Study On Electro-Static Protection And Reliability Detection Of ESD In Integrated Circuits

Under the background of Electro-Static discharge(ESD)becoming one of the increasingly serious reliability problems of chips and electronic products,this dissertation makes the researches from the following three aspects: the ESD tests of integrated circuits(IC),the analysis and design of ESD protection devices as well as the detections of latent ESD damages.These three aspects have a close connection with each other.Firstly,in order to simulate and test ESD protection devices,this paper proposes a continuous multiple pulse transient simulation method based on the conditions available.This method has some advantages,such as the high simulation precision,scientific value and popular use,etc.The method mainly includes the following steps:(1)setting up the ESD device structure model and optimizing grid mesh in the simulation tool;(2)adding a series of multiple pulses currents modeling transmission line pulse(TLP)testing principles at the anode and the cathode of the device,then carrying out the single pulse transient simulation at a time,and obtaining the voltage versus time,current versus time and maximum temperature versus time curves;(3)processing the voltage versus time and current versus time curves to obtain snapback curve,and getting the trigger voltage,holding voltage and discharge current through the above curves;(4)processing the maximum temperature versus time curves according to the melting temperature curve of silicon to acquire the second breakdown current.The second section of this paper accomplishes the analysis and design of three basic ESD devices including diode,Metal-Oxide-Semiconductor Field Effect Transistor(MOSFET)and Silicon Controlled Rectifier(SCR).As for the diode,this section mainly summarizes the working characteristics of basic diode,Schottky diode and Zener diode according to the simulations and measurements,and analyses the key problems to which we need to pay attention when applying these diodes.As for the MOSFET,this section analyses and summaries the surface-conductive operating mode and triode work pattern,and proposes the GGNMOS with the finger structure and layout optimization method that contacts keep away from gate-drain contact edge.Finally,this section analyses the basic working mechanism of SCR and a new modular design of the class device of SCR is proposed.And according to this method,this section also designs the novel modulation lateral SCR (MLSCR)and dynamic adjustable PMOS-triggering SCR(DPTSCR)devices.The simulation results show that the trigger voltage of the new MLSCR can be less than 10 V,and the trigger voltage of the DPTSCR can be less than 5V through adjusting the gate voltage of PMOS,which solves the high trigger voltage problem of SCR.This DPTSCR have the advantages of flexible application,high discharge rate and superior robustness.The third section is the designing of latent damage testing unit in protection module.This section proposes the latent damage testing scheme based on sensitive parameters of device and accomplishes the completed circuit design of ESD reliability test unit.The detection unit detects the latent damage degree of protection module through detecting the variations of different drain currents caused by the latent damage.Lastly,the correctness of function of circuits design is verified by Cadence simulation tool.The output results of designed circuits are stable and correct,and designed circuits allow a 0.15 V nose error of the threshold voltage and achieve the functions of ESD detection unit required in project design.