Research Of Electrostatic Discharge Protection In Integrated Circuits

As the technology is scaled down constantly, ESD (Electro-Static Discharge) has been one of the most important issues in IC's reliability. The improvements of process make the ESD-induced problem more tough and difficult to design ESD protection, and ESD protection is rarely researched in domestic academia. This dissertation mainly discusses the design of on-chip ESD protection units, the TCAD simulation, and the circuit-level modeling.ESD protection research is conducted based on the following processes: HHNEC 0.18μm EEPROM CMOS process, HJTK 0.18μm CMOS process, SMIC 0.18μm CMOS process and SMIC 90nm CMOS process. Firstly, the dissertation fabricates and tests the popularly used ESD protection devices thoroughly, such as LSCR (Lateral Silicon Controlled Rectifier), MLSCR (Modified Lateral Silicon Controlled Rectifier), LVTSCR (Low Voltage Trigger Silicon Controlled Rectifier), HHSCR (High Holding Silicon Controlled Rectifier) and the ESD protection devices with trigger circuits. Based on the research, two novel protection devices, polysilicon-assisted SCR (PASCR) and symmetrical layout SCR are demonstrated and investigated. Polysilicon layer is acquired in PASCR structure. TLP measurement results show that PASCR has an excellent robustness performance under ESD. One-finger PASCR device occupies only 947μm~2 layout area, but can withstand 7-kV HBM ESD stress. PASCR's robustness is explained as the result of "smoothing forward path effect" and "side bypassing path effect". As to the symmetrical layout SCR, the multi-finger MLSCR is built with dual-direction symmetrical layout and quad-direction symmetrical layout to form more current paths and to distribute ESD currents better. Measurement results of symmetrical layout SCR show that given the same layout areas, the robustness of the MLSCR with dual-direction symmetrical layout can be improved to more than two times of traditional multi-finger MLSCR and undergo 15-kV HBM ESD stress. Moreover, the MLSCR with quad-direction symmetrical layout consumes only 39 percent silicon area of the traditional dissymmetrical layout, but can meet the same ESD level. The measurement results further show that the S-type current-voltage (I-V) characteristics of PASCR and symmetrical layout SCR are adjustable to different operating demands. At last, the ESD protection solution based on SCR structure for a certain process in the practical industry is provided. Measurement shows that all the specifications have been met.When it comes to TCAD simulation of ESD protection device, the dissertation presents a methodology to evaluate protection performance of ESD protection devices. Mix-mode transient circuit simulation, which depicts ESD events better, is acquired in this method. The TCAD methodology can evaluate ESD protection device's robustness, effectiveness, transparency and speed synthetically. Then, the dissertation uses the TCAD methodology to compares the robustness of a SCR-based ESD protection device quantificationally using the newly defined parameter "robustness coefficient". This parameter can be acquired to compare robustness of different ESD devices under different ESD models and levels. Comparison of simulation and measurement results shows that, the TCAD method developed in the dissertation with good ability of convergence has great direction ability to the ESD protection design.Finally, the macro models of ggNMOS (gate grounded NMOS) and SCR based on Verilog-A are given in the dissertation. In modeling ggNMOS, a method to extract the parameters of both "avalanche breakdown" and "second breakdown" is provided. The model of SCR consists of seven macro blocks described in Verilog-A. Equations of the seven blocks are developed in the dissertation. Circuit-level simulation results of ggNMOS and SCR show that the macro models of the two devices are very useful for the simulation of the ESD protection network in circuit and system level.The research has great value to the ESD protection solution in the deep sub-quarter technology. Some designs in the dissertation have been utilized in a sub-quarter process (Including the solution for a certain company). The main creative points of the dissertation are: the design of ESD protection device using polysilicon layer, the design of symmetrical layout to improve turn-on uniformity, and TCAD method to evaluate ESD protection device's transient performance. The author has applied some patents based on those creative points above. The research is also innovative in building the circuit-level models of basic protection devices using macro models. In the future, the research will be continued in: making the TCAD simulation more accurate to the measurement data, and adjusting the characteristics of ESD protection devices.