An LVDS Interface Circuit Designed Based On CCD Image Sensor

As the information technology and the Internet technology have progressive development,we are going into the age of Big Data.The hardware is required to meet more applications.Besides the faster multi-task processing speed,it is required that data transfers in a higher speed.For example,the computing speed of CPU has exceeded the access speed of the memory in the PCs.Therefore,high-speed interface technology becomes an aroused general interest.LVDS is the abbreviation for low-voltage differential signal interface circuit,that is a very popular interface technology.The specific electrical parameters are specified by the protocol of ANSI / TIA / EIA-644 A.It could be replaced by the LVDS interface technology which is usually used by the COMS and TTL electrical level signals.It does not have the advantage for those traditional electrical level signal.There are advantages that less than 2Gb/s in point to point transmission rate,effective inhibition of common mode noise and achievement of lower power consumption and noise.This paper presents a fully functional circuit system that is applied for high speed transmission of parallel signals.It has the characteristics of fast transmission speed and high portability that includes serializer and LVDS driver.The serializer includes the shift register circuit,the clock generation circuit,the synchronous circuit,the frame signal generation circuit and the test circuit.The LVDS driver includes the main driver circuit,the conversion circuit which transfer Single-ended signals to differential signals,the common mode feedback circuit,the bias circuit,the resistance network circuit,the phase calibration circuit,the analog buffer circuit and the band gap reference circuit.The analysis and simulation verification of the LVDS interface circuit in result that we took a full custom layout design,for what we designed a test chip of LVDS interface circuit by 0.18 ?m CMOS process.A PCB circuit specially designed to test the characteristics of the test chip,which includes functional test and performance test.The simulation results of the test chip achieve the data transfer rate of 640Mb/s in various extreme cases.In the actual test,functions and performance which are designed meet the requirements.