High-speed Lvds Transmitter Design

With the development of information technology, more and more data traffic quantity expands and the speed of data transmission is required more and more quickly. The common parallel I/O interface circuit, because of its own transmission line and circuit structure's restrictions, can no longer meet the continuous development of high speed microprocessors, multimedia, optical transmission connection, smart routers, and the data bandwidth of network technology requirements. Moreover, with the improvement of data transmission speed, how to maintain low power consumption has become a focus of attention. In this case, we urgently need to find new I/O interface circuit to solve these serious problems. Low-voltage differential signal transmission technology (LVDS: Low Voltage Differential Signaling) which bases on serializer technology is a new technology to solve problems of the common parallel I/O interface. it uses differential signal transmission not only is an effective way to reduce noise and low electromagnetic interference, but also has low power consumption, low noise, low-cost advantages.Based on this thesis at ANSI/TIA/EIA-644 and IEEE P1596.3 standard for LVDS circuit principle and structure, I do an in-depth research on the LVDS and carry out a detailed analysis and summary the advantage of the LVDS. Based on LVDS send circuit in accordance with the various parts of the function, the whole circuit is divided into serialize circuit, buffer circuit, voltage reference, LVDS driver circuit in four sections.The serialize circuit fully uses the structure of common-gate input to realize the high frequency divider of the clock.The purposes of the buffer circuit are to change the CMOS signal from the single-ended to differential signal, at the same time, increasing the capacity of data transmission driver; the circuit is a digital-analog mixed design.Reference circuit is an analog circuit, the design process and temperature characteristics of the circuit are very strict required on the part of this circuit. I do an in-depth study and analysis of different structures of the reference implementation, as well as their strengths and weaknesses, using the technology of compensation of Vth to get a very high accuracy References to the implementation of the part of the function.LVDS drive circuit is a digital-analog mixed circuit. It is the core of the whole circuit, studying the thesis of its principles and structure analysis, I summary the drive circuits strengths and weaknesses of common structure and by using the technology of CMFB to compensation the weaknesses of common structure to achieve 2.5Gbps, high-precision LVDS driver circuit structure.Layout of LVDS send circuit is researched in-depth. The mismatch, crosstalk, noise, antenna effect, and latch effect are discussed in detail and put forward solutions. The designs of LVDS send circuit bases the SMIC 0.18μm CMOS process. The layout design uses full-custom layout method. To ensure the accuracy of the territory and eventually the performance of chips, I carry out the verification and post simulation.